ZHCSKK3B December 2019 – February 2022 TPS6594-Q1
PRODUCTION DATA
The LP_WKUP functions are activated through the edge detection of LP_WKUP pins, configurable as secondary functions of GPIO3 and GPIO4. They are specially designed to wake the device up from the LP STANDBY state when a high speed wake-up signal is detected. Similar to the WKUP1 and WKUP2 pins, when GPIO3 or GPIO4 pin is configured as an LP_WKUP1 pin, a rising or falling edge detected at the input of this pin (configurable by the GPIOn_FALL_MASK and the GPIOn_RISE_MASK bits) wakes up the device to the ACTIVE state. Likewise, if the pin is configured as an LP_WKUP2 pin, a detected edge wakes up the device to the MCU ONLY state. If multiple edge detections of LP_WKUP signals occur simultaneously, the device goes to the state in the following priority order:
The TPS6594-Q1 device supports limited CAN wake-up capability through the LP_WKUP1/2 pins. When an input signal (without deglitch) with logic level transition from high-to-low or low-to-high with a minimum pulse width of tWK_PW_MIN is detected on the assigned LP_WKUP1/2 pins, the device wakes up asynchronously and executes the power up sequence. CAN-transceiver RXD- or INH-outputs can be connected to the LP_WKUP pin. If RXD-output is used, it is assumed that the transceiver RXD-pin IO is powered by the transceiver itself from an external supply when TPS6594-Q1 is in the LP_STANDBY state. If INH-signal is used it has to be scaled down to the recommenced GPIO input voltage level specified in the electrical characteristics table.
In this PFSM example, the device can wake up from the LP_STANDBY state through the detection of LP_WKUP pins only if it enters the LP_STANDBY state through the TRIGGER_I2C_0 OFF request while the NSLEEPn signals are masked, and the on request initialized by the nPWRON/ENABLE pin remains active. Once a valid wake-up signal is detected at the LP_WKUP pin, it is handled as a WAKE request. The nINT pin generates an interrupt to signal the MCU of the wake-up event, and the corresponding GPIOx_INT interrupt bit is set. The wake request remains active until the interrupt bit is cleared by the MCU. Table 8-20 shows how the device returns to the state indicated by the NSLEEP1 and NSLEEP2 signals after the wake request is canceled.
Figure 8-43 illustrates the valid wake-up signal at the LP_WKUP1/2 pins, and the generation and clearing of the internal wake-up signal.