Note: When I²C Interfaces are used, each of the above listed register pages has its own 7-bit I²C device address. The I²C device address for Page 0 is according register bits I2C1_ID, for Page 1 the I²C device address is I2C1_ID + 1, for Page 2 the I²C device address is I2C1_ID + 2, and for Page 3 the I²C device address is I2C1_ID + 3. For Page 4 the I²C device address is according register bits I2C2_ID. Therefore, in case both I²C1 and I²C2 Interfaces are used, each TPS6594-Q1 device occupies four I²C device addresses (for Page 0, Page 1, Page 2 and Page 3) on the I²C1 bus and one I²C device address (for Page 4) on the I²C2 bus. And in case only I²C1 Interfaces is used, each TPS6594-Q1 device occupies five I²C device addresses (for Page 0, Page 1, Page 2, Page 3 and Page 4) on the I²C1 bus. In case multiple devices are used on a common I²C bus, care must be taken to avoid overlapping I²C device addresses.

Note: When SPI Interface is used, the above listed register pages are addresses with the PAGE[2:0] bits: 0x0 addresses Page 0, 0x1 addresses Page 1, 0x2 addresses Page 2, 0x3 addresses Page 3