ZHCSKK3B December 2019 – February 2022 TPS6594-Q1
PRODUCTION DATA
The device has two, exclusive selectable (from factory settings) interfaces. Please refer to the User's Guide of the orderable part number which option has been selected. The first selection is up to two high-speed I2C interfaces. The second selection is one SPI interface. The SPI and I2C1 interfaces are used to fully control and configure the device, and have access to all of the configuration registers and Watchdog registers. During normal operating mode, when the I2C configuration is selected, and GPIO1 and GPIO2 pins can be configured as the SCL_I2C2 and SDA_I2C2 pins, the I2C2 interface becomes the dedicated interface for the Q&A Watchdog communication channel, while I2C1 interface no longer has access to the Watchdog registers. The I2C2 interface is automatically disabled and has access to all of the registers, including the Watchdog registers, when the device enters the NVM programing mode.