The TPS65987DDJ has three I²C interface ports. I²C Port 1 is comprised of the I2C1_SDA, I2C1_SCL, and I2C1_IRQ1 pins. I²C Port 2 is comprised of the I2C2_SDA, I2C2_SCL, and I2C2_IRQ pins. These interfaces provide general status information about the TPS65987DDJ, as well as the ability to control the TPS65987DDJ behavior, as well as providing information about connections detected at the USB-C receptacle and supporting communications to/from a connected device and/or cable supporting BMC USB-PD. I²C Port 3 is comprised of the I2C3_SDA, I2C3_SCL, and I2C3_IRQ1 pins. This interface is used as a general I²C master to control external I²C devices such as a super-speed mux or re-timer.

The first port can be a master or a slave, but the default behavior is to be a slave. The second port operates as a slave only. Port 1 and Port 2 are interchangeable as slaves. Both Port1 and Port2 operate in the same way and has the same access in and out of the core. An interrupt mask is set for each that determines what events are interrupted on that given port. Port 3 operates as a master only.