ZHCSIY2B July 2018 – August 2021 TPS65988
PRODUCTION DATA
The TPS65988 includes two integrated PWM drivers which may be multiplexed onto GPIO 14 and GPIO 15. The PWM driver implements an 8-bit counter driven by either the internal 100-kHz clock or internal 24-MHz clock. The counter increments by a configurable 4-bit value each clock cycle which determines the output PWM frequency. The PWM duty cycle is set by a configurable 8-bit value which sets the count threshold for the high to low edge.
During Sleep power state the 24-MHz clock is unavailable, any PWM drivers running from this clock is also be disabled when entering the sleep state. If PWM output is needed in Sleep, the output must be configured to use the 100-kHz clock.