The recommended discrete power path includes reverse current protection to disable the power path when both sink paths are enabled at different PD contracts. In Figure 9-1 a comparator is used to force disable the external power path when the common source voltage is higher than the system voltage. The comparator circuit has hysteresis added to prevent any oscillations when the system voltage is very close to the common source voltage. The NMOS driven by the comparator will pull the PEXTx to GND when the common source voltage is higher than the system power and the 1k in series will limit the current drawn from the PEXTx GPIO. The comparator is powered from LDO_3V3 on the TPS65988 which mean that even in dead battery operation the comparator circuit will remain active regardless of the state of PEXTx. For lower power consumption from VBUS the voltage dividers for the comparator inputs can use higher resistance values.

Figure 9-1 Recommended Sink Power Path

The simplest discrete power path does not have reverse current protection and relies on either on the configuration to only enable the power path with the highest power PD contract or on the EC to enable and disable the power path. This simple power path has some limitations as it will always be fully on or fully off and both paths cannot be enabled at the same time. Figure 9-2 shows the design.

Figure 9-2 Simple Sink Power Path

For both discrete implementations the R1 and R2 divider should be selected to reach the PMOS threshold (Vgs) at 5 V and 20 V to insure the common source PMOS are completely on. When the sink path is enabled the R1 and R2 resistance will draw current from VBUS. For systems that need to meet low power requirements it is recommended to use higher resistance values for R1 and R2 but this will slow how fast the external sink path turns off and on. A R1 = 100k and R2 = 10k is a good medium that will draw around 3.6mW from VBUS at 20 V and will create enough VGS for most PMOS.