ZHCSLY5A August 2020 – July 2021 TPS65994AD
PRODUCTION DATA
The TPS65994AD power management block receives power and generates voltages to provide power to the TPS65994AD internal circuitry. These generated power rails are LDO_3V3 and LDO_1V5. LDO_3V3 may also be used as a low power output for external EEPROM memory. The power supply path is shown in Figure 8-9.
The TPS65994AD is powered from either VIN_3V3, PA_VBUS, or PB_VBUS. The normal power supply input is VIN_3V3. When powering from VIN_3V3, current flows from VIN_3V3 to LDO_3V3 to power the core 3.3-V circuitry and I/Os. A second LDO steps the voltage down from LDO_3V3 to LDO_1V5 to power the 1.5-V core digital circuitry. When VIN_3V3 power is unavailable and power is available on PA_VBUS, or PB_VBUS it is referred to as the dead-battery startup condition. In a dead-battery startup condition, the TPS65994AD opens the VIN_3V3 switch until the host clears the dead-battery flag via I2C. Therefore, the TPS65994AD is powered from the VBUS input with the higher voltage during the dead-battery startup condition and until the dead-battery flag is cleared. When powering from a VBUS input, the voltage on PA_VBUS, or PB_VBUS is stepped down through an LDO to LDO_3V3.