10.1 Layout Guidelines

To improve AC performance such as PSRR, output noise, and transient response, TI recommends designing the board with separate ground planes for V_IN and V_OUT, with the ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor should be connected directly to the GND pin of the device. High equivalent series resistance (ESR) capacitors may degrade PSRR. The BIAS pin draws very little current and can be routed as a signal (make sure to shield it from high-frequency coupling).