10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance

To improve ac performance (such as PSRR, output noise, and transient response), TI recommends that the board be designed with separate ground planes for V_IN and V_OUT, with the ground plane connected only at the GND pin of the device. In addition, the ground connection for the output capacitor must be connected directly to the GND pin of the device. High ESR capacitors may degrade PSRR.

10.1.2 Power Dissipation

The ability to remove heat from the die is different for each package type, presenting different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.

Power dissipation depends on input voltage and load conditions. Power dissipation (P_D) is equal to the product of the output current times the voltage drop across the output pass element (V_IN to V_OUT), as shown in Equation 3:

Equation 3.

10.1.3 Package Mounting

Solder pad footprint recommendations and recommended land patterns are attached to the end of this document.

10.2.1 DSE EVM Board Layout

This section provides the TPS727xxDSEEVM-406 board layout and illustrations.

Figure 36. Top Layer Assembly

Figure 37. Top Layer Routing

Figure 38. Bottom Layer Routing

Figure 39. Bottom Layer Assembly

10.2.2 YFF EVM Board Layout

This section provides the TPS727xxYFFEVM-407 board layout and illustrations.

Figure 40. Top Layer Assembly

Figure 41. Top Layer Routing

Figure 42. Bottom Layer Routing

Figure 43. Bottom Layer Assembly