SBVS054J November   2004  – April 2015 TPS730

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Shutdown
      3. 7.3.3 Foldback Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Operation
      2. 8.1.2 Capacitor Recommendations
      3. 8.1.3 Input and Output Capacitor Requirements
      4. 8.1.4 Noise Reduction and Feed-Forward Capacitor Requirements
      5. 8.1.5 Reverse Current Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 TPS730YZQ Nanostar™ Wafer Chip Scale Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage Input range, VIN –0.3 6 V
Enable range, VEN –0.3 6
Output range, VOUT –0.3 6
Current Peak output, IOUT(max) Internally limited
Continuous total power dissipation SeeThermal Information
Temperature Junction, TJ DBV package –40 150 °C
YZQ package –40 125
Storage, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted).
MIN NOM MAX UNIT
VIN Input supply voltage 2.7 5.5 V
VEN Enable supply voltage 0 VIN V
VOUT Output voltage VFB 5 V
IOUT Output current 0 200 mA
TJ Operating junction temperature –40 125 °C
CIN Input capacitor 0.1 1 µF
COUT Output capacitor 2.2(1) 10 µF
CNR Noise reduction capacitor 0 10 nF
CFF Feed-forward capacitor 15 pF
R2 Lower feedback resistor 30.1 kΩ
(1) If CFF is not used or VOUT(nom) < 1.8 V, the minimum recommended COUT = 4.7 µF.

6.4 Thermal Information

THERMAL METRIC(1) TPS73001 UNIT
DBV (SOT-23) YZQ (DSBGA)
6 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 225.1 178.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 78.4 1.4
RθJB Junction-to-board thermal resistance 54.7 62.1
ψJT Junction-to-top characterization parameter 3.3 0.9
ψJB Junction-to-board characterization parameter 53.8 62.1
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Over recommended operating temperature range TJ = –40 to +125°C, VEN = VIN, VIN = VOUT(nom) + 1 V(1), IOUT = 1 mA, COUT = 10 μF, CNR = 0.01 μF (unless otherwise noted). Typical values are at 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range(1) 2.7 5.5 V
IOUT Continuous output current 0 200 mA
VFB Internal reference (TPS73001) 1.201 1.225 1.25 V
VOUT Output voltage range TPS73001 VFB 5.5 – VDO V
Output voltage accuracy 0 µA ≤ IOUT ≤ 200 mA, 2.75 V ≤ VIN ≤ 5.5 V –2% VOUT(nom) 2% V
ΔVOUT(ΔVIN) Line regulation(1) VOUT + 1 V ≤ VIN ≤ 5.5 V 0.05 %/V
ΔVOUT(ΔIOUT) Load regulation 0 µA ≤ IOUT ≤ 200 mA, TJ = 25°C 5 mV
VDO Dropout voltage(2)
(VIN = VOUT(nom) – 0.1 V)		 IOUT = 200 mA 120 210 mV
ICL Output current limit VOUT = 0 V 285 600 mA
IGND Ground pin current 0 µA < IOUT < 200 mA 170 250 μA
ISHUTDOWN Shutdown current(3) VEN = 0 V, 2.7 V ≤ VIN ≤ 5.5 V 0.07 1 μA
IFB FB pin current VFB = 1.8 V 1 μA
PSRR Power-supply rejection ratio TPS73028 f = 100 Hz, IOUT = 200 mA, TJ = 25°C 68 dB
Vn Output noise voltage TPS73018 BW = 200 Hz to 100 kHz, IOUT = 200 mA,
CNR = 0.01 μF		 33 μVRMS
tSTR Start-up time TPS73018 RL = 14 Ω, COUT = 1 µF, CNR = 0.001 μF 50 μs
VEN(high) High-level enable input voltage 2.7 V ≤ VIN ≤ 5.5 V 1.7 VIN V
VEN(low) Low-level enable input voltage 2.7 V ≤ VIN ≤ 5.5 V 0 0.7 V
IEN EN pin current VEN = 0 V –1 1 μA
UVLO Threshold, VCC rising 2.25 2.65 V
Hysteresis 100 mV
(1) Minimum VIN is 2.7 V or VOUT + VDO, whichever is greater.
(2) Dropout is not measured for the TPS73018 and TPS73025 since minimum VIN = 2.7 V.
(3) For adjustable versions, this applies only after VIN is applied; then VEN transitions high to low.

6.6 Typical Characteristics

Over recommended operating temperature range TJ = –40°C to +125°C, VEN = VIN, VIN = VOUT(nom) + 1 V, IOUT = 1 mA, COUT = 10 μF, CNR = 0.01 μF, VOUT(nom) = 2.8 V (unless otherwise noted). Typical values are at TJ = 25°C.
TPS730 VO_v_IO_bvs054.gif
Figure 1. TPS73028 Output Voltage vs Output Current
TPS730 GND_v_TJ_bvs054.gif
Figure 3. TPS73028 Ground Current vs Junction Temperature
TPS730 tc_rms_out-cnr_bvs054.gif
Figure 5. Root Mean Square Output Noise vs CNR
TPS730 RIP1_v_f_bvs054.gif
Figure 7. TPS73028 Ripple Rejection vs Frequency
TPS730 LineTR_bvs054.gif
Figure 9. TPS73028 Line Transient Response
TPS730 Power_plot_bvs054.gif
Figure 11. Power Up and Power Down
TPS730 ESR1_v_IO_bvs054.gif
Figure 13. Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current
TPS730 VO_v_TJ_bvs054.gif
Figure 2. TPS73028 Output Voltage vs Junction Temperature
TPS730 OSN_IO200_bvs054.gif
Figure 4. TPS73028 Output Spectral Noise Density vs Frequency
TPS730 VDO_v_TJ_bvs054.gif
Figure 6. TPS73028 Dropout Voltage vs Junction Temperature
TPS730 VO_v_time_bvs054.gif
Figure 8. TPS73028 Output Voltage, Enable Voltage vs Time (Start-Up)
TPS730 LoadTR_bvs054.gif
Figure 10. TPS73028 Load Transient Response
TPS730 VDO_v_IO_bvs054.gif
Figure 12. Dropout Voltage vs Output Current
TPS730 ESR2_v_IO_bvs054.gif
Figure 14. Typical Regions of Stability Equivalent Series Resistance (ESR) vs Output Current
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP | 米乐app下载官网（中国）|ios|Android/通用版APP最新版 | 米乐|米乐·M6（中国大陆）官方网站 | 千亿体育登陆地址 | 华体会体育（中国）HTH·官方网站 | 千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载 | 18新利网v1.2.5|中国官方网站 | bob电竞真人（中国官网）安卓/ios苹果/电脑版【1.97.95版下载】 | 千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装 |