The TPS736 uses an NMOS pass transistor to achieve extremely low dropout. When (V_IN – V_OUT) is less than the dropout voltage (V_DO), the NMOS pass transistor is in the linear region of operation and the input-to-output resistance is the R_DS(on) of the NMOS pass transistor.

For large step changes in load current, the TPS736 requires a larger voltage drop from V_IN to V_OUT to avoid degraded transient response. The boundary of this transient dropout region is approximately twice the dc dropout. Values of V_IN – V_OUT above this line ensure normal transient response.

Operating in the transient dropout region can cause an increase in recovery time. The time required to recover from a load transient is a function of the magnitude of the change in load current rate, the rate of change in load current, and the available headroom (V_IN to V_OUT voltage drop). Under worst-case conditions [full-scale instantaneous load change with (V_IN – V_OUT) close to dc dropout levels], the TPS736 can take a couple of hundred microseconds to return to the specified regulation accuracy.