ZHCSHM2C June   2018  – May 2022 TPS746-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Shutdown
      3. 7.3.3 Foldback Current Limit
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Device Feedback Resistors
      2. 8.1.2 Input and Output Capacitor Selection
      3. 8.1.3 Dropout Voltage
      4. 8.1.4 Exiting Dropout
      5. 8.1.5 Reverse Current
      6. 8.1.6 Power Dissipation (PD)
      7. 8.1.7 Power-Good Function
      8. 8.1.8 Feed-Forward Capacitor (CFF)
      9. 8.1.9 Start-Up Sequencing
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Current
        2. 8.2.2.2 Thermal Dissipation
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
      1.      Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

Figure 5-1 DRV Package,6-Pin Adjustable WSON(Top View)
Figure 5-3 DRB Package,8-Pin Adjustable VSON(Top View)
Figure 5-2 DRV Package,6-Pin Fixed WSON
(Top View)
Figure 5-4 DRB Package,8-Pin Fixed VSON
(Top View)
Table 5-1 Pin Functions
PIN I/O DESCRIPTION
NAME DRV
(Fixed)		 DRV
(Adjust)		 DRB
(Fixed)		 DRB
(Adjust)
EN 4 4 5 5 Input Enable pin. Drive EN greater than VEN(HI) to turn on the regulator. Drive EN less than VEN(LO) to put the low-dropout regulator (LDO) into shutdown mode.
FB — 2 — 3 — This pin is used as an input to the control loop error amplifier and is used to set the output voltage of the LDO.
GND 3 3 4 4 — Ground pin.
IN 6 6 8 8 Input Input pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground as listed in the Section 6.3 table and the Section 8.1.2 section. Place the input capacitor as close to the output of the device as possible.
NC 2 — 2, 3, 7 2, 7 — No internal connection. Ground this pin for better thermal performance.
OUT 1 1 1 1 Output Regulated output voltage pin. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Section 6.3 table and the Section 8.1.2 section. Place the output capacitor as close to the output of the device as possible.
PG 5 5 6 6 Output Power-good output. Available in open-drain and push-pull topologies. A pullup resistor is required for the open-drain version. For the open-drain version, if the power-good functionality is not being used, ground this pin or leave floating. For the push-pull version, if the power-good functionality is not being used, leave this pin floating.
Thermal Pad — The thermal pad is electrically connected to the GND node. Connect to the GND plane for improved thermal performance.
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