ZHCSN52D April   2010  – December 2023 TPS74701-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics: IOUT = 50 mA
    7. 5.7 Typical Characteristics: VEN = VIN = 1.8 V, VOUT = 1.5 V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Transient Response
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Output Noise
      4. 6.3.4 Enable and Shutdown
      5. 6.3.5 Power Good
      6. 6.3.6 Internal Current Limit
      7. 6.3.7 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input, Output, and Bias Capacitor Requirements
        2. 7.2.2.2 Programmable Soft-Start
        3. 7.2.2.3 Sequencing Requirements
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Layout Recommendations and Power Dissipation
        2. 7.4.1.2 Estimating Junction Temperature
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
      2. 8.1.2 Device Nomenclature
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 Pin Configuration and Functions

GUID-E7FFFEE3-3843-479B-8CD2-895BABB1168C-low.svg Figure 4-1 DRC Package,10-Pin VSON(Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
BIAS 4 I Bias pin. Input voltage for error amplifier, reference, and internal control circuits.
EN 5 I Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode. This pin must not be left unconnected.
FB 8 I Feedback pin. The feedback connection to the center tap of an external resistor divider network that sets the output voltage. This pin must not be left floating.
GND 6 — Ground pin.
IN 1, 2 I Input pin. This pin supplies the input voltage to the device. For best transient response and to minimize input impedance, use the recommended value or larger capacitor from IN to GND, as listed in the Recommended Operating Conditions table. Place the input capacitors as close as possible to the IN and GND pins of the device.
OUT 9, 10 O Output pin. Regulated output voltage, a small capacitor (total typical capacitance ≥ 2.2 µF, ceramic) is needed from this pin to ground to assure stability. Place the output capacitors as close as possible to the OUT and GND pins of the device.
PG 3 O Power-good pin. This pin is an open-drain, active-high output that indicates the status of VOUT; see the Power Good section for additional information.
SS 7 — Soft-start pin. A capacitor connected on this pin to ground sets the start-up time. If this pin is left unconnected, the regulator output soft-start ramp time is typically 200 µs; see the Programmable Soft-Start section for further information.
Thermal Pad — — Connect the pad to GND for the best possible thermal performance.
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