SLVS389M September 2002 – September 2015 TPS786
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS786 family of low-dropout (LDO) regulators has been optimized for use in noise-sensitive equipment. The device features extremely low dropout voltages, high PSRR, ultralow-output noise, low quiescent current (265 μA, typically), and enable input to reduce supply currents to less than 1 μA when the regulator is turned off.
8.1.1 Programming the TPS78601 Adjustable LDO Regulator
The output voltage of the TPS78601 adjustable regulator is programmed using an external resistor divider as shown in Figure 26. The output voltage is calculated using Equation 1:
where
- VREF = 1.2246 V typical (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 40-μA divider current. Lower value resistors can be used for improved noise performance, but the device wastes more power. Higher values should be avoided, as leakage current at FB increases the output voltage error.
The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 40 μA, C1 = 15 pF for stability, and then calculate R1 using Equation 2.
To improve the stability of the adjustable version, TI suggests placing a small compensation capacitor between OUT and FB.
The approximate value of this capacitor can be calculated using Equation 3:
The suggested value of this capacitor for several resistor ratios is shown in Figure 26. If this capacitor is not used (such as in a unity-gain configuration), then the minimum recommended output capacitor is 2.2 μF instead of 1 μF.
Figure 26. TPS78601 Adjustable LDO Regulator Programming
8.2 Typical Application
A typical application circuit is shown in Figure 27.
Figure 27. Typical Application Circuit
8.2.1 Design Requirements
Table 1 shows the design parameters for this application.
Table 1. Design Parameters
| DESIGN PARAMETERS | EXAMPLE VALUE |
|---|---|
| VIN (from DCDC) | Minimum = 4 V Maximum = 5.5 V |
| VOUT | 3 V ± –1% |
| IOUT | Minimum = 1 mA Maximum = 1.5 A |
| PSRR at 1K | >50 db |
| Noise at 1K | <20 µV/√Hz |
8.2.2 Detailed Design Procedure
Select TPS78630 to satisfy the VOUT requirements. The fixed version of the device is chosen to save board space and reduce BOM cost.
Use a 2.2-uF capacitor on both the input and output to satisfy the capacitor requirements. Select a 0.1-uF NR capacitor to satisfy the noise requirement.
8.2.2.1 External Capacitor Requirements
A 2.2-μF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS786, is required for stability and improves transient response, noise rejection, and ripple rejection. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source.
Like most low-dropout regulators, the TPS786 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitor is 1 μF. Any 1-μF or larger ceramic capacitor is suitable.
The internal voltage reference is a key source of noise in an LDO regulator. The TPS786 has an NR pin that is connected to the voltage reference through a 250-kΩ internal resistor. The 250-kΩ internal resistor, in conjunction with an external bypass capacitor connected to the NR pin, creates a low pass filter to reduce the voltage reference noise and, therefore, the noise at the regulator output. For the regulator to operate properly, the current flow out of the NR pin must be at a minimum, because any leakage current creates an IR drop across the internal resistor, thus creating an output error. Therefore, the bypass capacitor must have minimal leakage current. The bypass capacitor should be no more than 0.1-μF to ensure that it is fully charged during the quickstart time provided by the internal switch shown in Functional Block Diagrams.
For example, the TPS78630 exhibits only 48 μVRMS of output voltage noise using a 0.1-μF ceramic bypass capacitor and a 10-μF ceramic output capacitor. The output starts up slower as the bypass capacitance increases due to the RC time constant at the bypass pin that is created by the internal 250-kΩ resistor and external capacitor.
8.2.3 Application Curves
Figure 28. Ripple Rejection vs Frequency
Figure 29. Output Spectral Noise Density vsFrequency