11.1 Layout Guidelines

Layout is a critical part of good power-supply design. There are several signal paths that conduct fast-changing currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade the power-supply performance. To help eliminate these problems, the IN pin should be bypassed to ground with a low ESR ceramic bypass capacitor with an X5R or X7R dielectric.

Equivalent series inductance (ESL) and equivalent series resistance (ESR) must be minimized to maximize performance and ensure stability. Every capacitor (C_IN, C_OUT, C_NR/SS, C_FF) must be placed as close as possible to the device and on the same side of the PCB as the regulator itself. Do not place any of the capacitors on the opposite side of the PCB from where the regulator is installed. The use of vias and long traces is strongly discouraged because these circuits may impact system performance negatively, and even cause instability

11.2 Layout Example

Figure 28. Layout Example (DBV Package)

11.3 Power Dissipation and Junction Temperature

Specified regulator operation is ensured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P_D(max), and the actual dissipation, P_D, which must be less than or equal to P_D(max).

The maximum power dissipation limit is determined using Equation 4.

Equation 4.

where

• T_Jmax = Maximum allowable junction temperature
• R_θJA = Thermal resistance, junction to ambient, for the package, see the Thermal Information table
• T_A = Ambient temperature

The regulator dissipation is calculated using Equation 5.

Equation 5.

Power dissipation resulting from quiescent current is negligible. Excessive power dissipation triggers the thermal protection circuit.