6.4 Thermal Information
over operating free-air temperature range (unless otherwise noted)
THERMAL METRIC(1)(2) |
TPS795(3) |
UNIT |
DRB (VSON) |
DCQ (SOT-223) |
6 PINS |
8 PINS |
RθJA |
Junction-to-ambient thermal resistance |
46.8 |
74.0 |
°C/W |
RθJC(top) |
Junction-to-case (top) thermal resistance |
45.1 |
44.5 |
°C/W |
RθJB |
Junction-to-board thermal resistance |
18.4 |
8.6 |
°C/W |
ψJT |
Junction-to-top characterization parameter |
0.7 |
3.2 |
°C/W |
ψJB |
Junction-to-board characterization parameter |
18.4 |
8.5 |
°C/W |
RθJC(bot) |
Junction-to-case (bottom) thermal resistance |
5.3 |
N/A |
°C/W |
(3) Thermal data for the DRB and DCQ packages are derived by thermal simulations based on JEDEC-standard methodology as specified in the JESD51 series. The following assumptions are used in the simulations:
- i. DRB: The exposed pad is connected to the PCB ground layer through a 2-mm x 2-mm thermal via array.
.ii. DCQ: The exposed pad is connected to the PCB ground layer through a 3-mm x 2-mm thermal via array.
- i. DRB: The top and bottom copper layers are assumed to have a 20% thermal conductivity of copper representing a 20% copper coverage.
.ii. DCQ: Each of top and bottom copper layers has a dedicated pattern for 20% copper coverage.
- These data were generated with only a single device at the center of a JEDEC high-K (2s2p) board with 3in × 3in copper area. To understand the effects of the copper area on thermal performance, see Thermal Considerations and Estimating Junction Temperature of this data sheet.