ZHCSHN3D February   2018  – August 2019 TPS7A05

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      典型应用电路
      2.      接地电流与输出电流间的关系
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excellent Transient Response
      2. 7.3.2 Active Discharge
      3. 7.3.3 Low IQ in Dropout
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Enable
      6. 7.3.6 Internal Foldback Current Limit
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Mode
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disable Mode
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Special Considerations When Ramping Down VIN and Enable
      4. 8.1.4 Load Transient Response
      5. 8.1.5 Dropout Voltage
        1. 8.1.5.1 Behavior When Transitioning From Dropout Into Regulation
        2. 8.1.5.2 Behavior of Output Resulting From Line Transient When in Dropout
      6. 8.1.6 Undervoltage Lockout (UVLO) Operation
      7. 8.1.7 Power Dissipation (PD)
        1. 8.1.7.1 Estimating Junction Temperature
        2. 8.1.7.2 Recommended Area for Continuous Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Design Considerations
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 Spice 模型
      2. 11.1.2 器件命名规则
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Power Dissipation (PD)

Circuit reliability demands that proper consideration be given to device power dissipation, location of the circuit on the printed circuit board (PCB), and correct sizing of the thermal plane. The PCB area around the regulator must be as free as possible of other heat-generating devices that cause added thermal stresses.

Equation 2 calculates the maximum allowable power dissipation for the device in a given package:

Equation 2. PD-MAX = ((TJ – TA) / RθJA)

Equation 3 represents the actual power being dissipated in the device:

Equation 3. PD = (VIN - VOUT) × IOUT

An important note is that power dissipation can be minimized, and thus greater efficiency achieved, by proper selection of the system voltage rails. Proper selection allows the minimum input-to-output voltage differential to be obtained. The low dropout of the TPS7A05 allows for maximum efficiency across a wide range of output voltages.

The main heat conduction path for the device depends on the ambient temperature and the thermal resistance across the various interfaces between the die junction and ambient air.

The maximum power dissipation determines the maximum allowable junction temperature (TJ) for the device. According to Equation 4, maximum power dissipation and junction temperature are most often related by the junction-to-ambient thermal resistance (RθJA) of the combined PCB and device package and the temperature of the ambient air (TA). The equation is rearranged in Equation 5 for output current.

Equation 4. TJ = TA + (RθJA × PD)
Equation 5. IOUT = (TJ – TA) / [RθJA × (VIN – VOUT)]

Unfortunately, this thermal resistance (RθJA) is highly dependent on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The RθJA recorded in the Thermal Information table is determined by the JEDEC standard, PCB, and copper-spreading area, and is only used as a relative measure of package thermal performance. For a well-designed thermal layout, RθJA is actually the sum of the DQN package junction-to-case (bottom) thermal resistance (RθJC(bot)) plus the thermal resistance contribution by the PCB copper.