The device contains a thermal shutdown protection circuit to disable the device when the thermal junction temperature (T_J ) of the main pass-FET rises to the thermal shutdown temperature (T_SD) for shutdown listed in the Electrical Characteristics table. Thermal shutdown hysteresis ensures that the LDO resets again (turns on) when the temperature falls to T_SD for reset.

The thermal time constant of the semiconductor die is fairly short, and thus the device may cycle on and off when thermal shutdown is reached until the power dissipation is reduced.

For reliable operation, limit the junction temperature to a maximum of 125°C. Operation above 125°C causes the device to exceed the operational specifications. Although the internal protection circuitry of the device is designed to protect against thermal overload conditions, this circuitry is not intended to replace proper heat sinking. Continuously running the device into thermal shutdown or above a junction temperature of 125°C reduces long-term reliability.

A fast start up when T_J > T_SD for reset (typical, outside of the specified operation range) causes the device thermal shutdown to assert at T_SD for reset, and prevents the device from turning on until the junction temperature is reduced below T_SD for reset.