Dropout voltage (V_DO) is defined as the input voltage minus the output voltage (V_IN – V_OUT) at the rated output current (I_RATED), where the pass transistor is fully on. I_RATED is the maximum I_OUT listed in the Section 6.3 table. The pass transistor is in the ohmic or triode region of operation, and acts as a switch. The dropout voltage indirectly specifies a minimum input voltage greater than the nominal programmed output voltage at which the output voltage is expected to stay in regulation. If the input voltage falls to less than the nominal output regulation, then the output voltage falls as well.

For a CMOS regulator, the dropout voltage is determined by the drain-source on-state resistance (R_DS(ON)) of the pass transistor. Therefore, if the linear regulator operates at less than the rated current, the dropout voltage for that current scales accordingly. Use Equation 1 to calculate the R_DS(ON) of the device.

Equation 1.

Using a bias rail enables the TPS7A13 to achieve a lower dropout voltage between IN and OUT. However, a minimum bias voltage above the nominal programmed output voltage must be maintained. Figure 6-13 specifies the minimum V_BIAS headroom required to maintain output regulation.