The power-good (PG) pin is an open-drain output and can be connected to any 5.5-V or lower rail through an external pullup resistor. When no C_DELAY is used, the PG output is high-impedance when V_OUT is greater than the PG trip threshold (V_IT). If V_OUT drops below V_IT, the open-drain output turns on and pulls the PG output low. If output voltage monitoring is not needed, the PG pin can be left floating or connected to GND.

To ensure proper operation of the power-good feature, maintain V_IN ≥ 3 V (V_{IN_MIN}).