10.1.1 Power Dissipation and Thermal Considerations

Calculate the power dissipated in the device using Equation 1.

I_QUIESCENT << I_OUT; therefore, ignore the term I_QUIESCENT × V_IN in Equation 1.

For a device under operation at a given ambient air temperature (T_A), calculate the junction temperature (T_J) using Equation 2.

Calculate the rise in junction temperature due to power dissipation using Equation 3.

For a given maximum junction temperature (T_J-Max), calculate the maximum ambient air temperature (T_A-Max) at which the device can operate using Equation 4.

Example

If I_OUT = 100 mA, V_OUT = 5 V, V_IN = 14 V, I_QUIESCENT = 250 µA and θ_JA= 30˚C/W, the continuous power dissipated in the device is 0.9 W. The rise in junction temperature due to power dissipation is 27˚C. For a maximum junction temperature of 150˚C, maximum ambient air temperature at which the device can operate is 123˚C.

For adequate heat dissipation, TI recommends soldering the power pad (exposed heat sink) to the thermal land pad on the PCB. Doing this provides a heat conduction path from the die to the PCB and reduces overall package thermal resistance. Figure 22 shows power derating curves for the TPS7A65-Q1 family of devices in the KVU (DPAK) package.

Figure 22. Power Derating Curves

For optimum thermal performance, TI recommends using a high-K PCB with thermal vias between the ground plane and solder pad or thermal land pad. Figure 23 (a) and (b) show this. Further, a design can improve the heat-spreading capabilities of a PCB considerably by using a thicker ground plane and a thermal land pad with a larger surface area.

Figure 23. Using a Multilayer PCB and Thermal Vias for Adequate Heat Dissipation

Keeping other factors constant, the surface area of the thermal land pad contributes to heat dissipation only to a certain extent. Figure 24 shows the variation of θ_JA with surface area of the thermal land pad (soldered to the exposed pad) for the KVU package.

Figure 24. θ_JA vs Thermal Pad Area