ZHCSEI2B January   2016  – June 2021 TPS7A84

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configurations and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Low-Noise, High-PSRR Output
      2. 7.3.2  Integrated Resistance Network (ANY-OUT)
      3. 7.3.3  Bias Rail
      4. 7.3.4  Power-Good Function
      5. 7.3.5  Programmable Soft-Start
      6. 7.3.6  Internal Current Limit (ILIM)
      7. 7.3.7  Enable
      8. 7.3.8  Active Discharge Circuit
      9. 7.3.9  Undervoltage Lockout (UVLO)
      10. 7.3.10 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation with 1.1 V ≤ VIN < 1.4 V
      2. 7.4.2 Operation with 1.4 V ≤ VIN ≤ 6.5 V
      3. 7.4.3 Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Recommended Capacitor Types
      2. 8.1.2  Input and Output Capacitor Requirements (CIN and COUT)
      3. 8.1.3  Noise-Reduction and Soft-Start Capacitor (CNR/SS)
      4. 8.1.4  Feed-Forward Capacitor (CFF)
      5. 8.1.5  Soft-Start and In-Rush Current
      6. 8.1.6  Optimizing Noise and PSRR
      7. 8.1.7  Charge Pump Noise
      8. 8.1.8  ANY-OUT Programmable Output Voltage
      9. 8.1.9  ANY-OUT Operation
      10. 8.1.10 Increasing ANY-OUT Resolution for LILO Conditions
      11. 8.1.11 Current Sharing
      12. 8.1.12 Adjustable Operation
      13. 8.1.13 Sequencing Requirements
        1. 8.1.13.1 Sequencing with a Power-Good DC-DC Converter Pin
        2. 8.1.13.2 Sequencing with a Microcontroller (MCU)
      14. 8.1.14 Power-Good Operation
      15. 8.1.15 Undervoltage Lockout (UVLO) Operation
      16. 8.1.16 Dropout Voltage (VDO)
      17. 8.1.17 Behavior when Transitioning from Dropout into Regulation
      18. 8.1.18 Load Transient Response
      19. 8.1.19 Negatively-Biased Output
      20. 8.1.20 Reverse Current Protection
      21. 8.1.21 Power Dissipation (PD)
      22. 8.1.22 Estimating Junction Temperature
      23. 8.1.23 Recommended Area for Continuous Operation (RACO)
    2. 8.2 Typical Applications
      1. 8.2.1 Low-Input, Low-Output (LILO) Voltage Conditions
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Typical Application for a 5.0-V Rail
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

ANY-OUT Programmable Output Voltage

The TPS7A84 can use either external resistors or the internally-matched ANY-OUT feedback resistor network to set output voltage. The ANY-OUT resistors are accessible via pin 2 and pins 5 to 11 and are used to program the regulated output voltage. Each pin is can be connected to ground (active) or left open (floating), or connected to SNS. ANY-OUT programming is set by Equation 4 as the sum of the internal reference voltage (VNR/SS = 0.8 V) plus the accumulated sum of the respective voltages assigned to each active pin; that is, 50mV (pin 5), 100mV (pin 6), 200mV (pin 7), 400mV (pin 9), 800mV (pin 10), or 1.6V (pin 11). Table 8-2 summarizes these voltage values associated with each active pin setting for reference. By leaving all program pins open or floating, the output is thereby programmed to the minimum possible output voltage equal to VFB.

Equation 4. VOUT = VNR/SS + (Σ ANY-OUT Pins to Ground)
Table 8-2 ANY-OUT Programmable Output Voltage
ANY-OUT PROGRAM PINS (Active Low) ADDITIVE OUTPUT VOLTAGE LEVEL
Pin 5 (50mV) 50 mV
Pin 6 (100mV) 100 mV
Pin 7 (200mV) 200 mV
Pin 9 (400mV) 400 mV
Pin 10 (800mV) 800 mV
Pin 11 (1.6V) 1.6 V

Table 8-3 provides a full list of target output voltages and corresponding pin settings when the ANY-OUT pins are only tied to ground or left floating. The voltage setting pins have a binary weight; therefore, the output voltage can be programmed to any value from 0.8 V to 3.95 V in 50-mV steps when tying these pins to ground. There are several alternative ways to set the output voltage. The program pins can be driven using external general-purpose input/output pins (GPIOs), manually connected using 0-Ω resistors (or left open), or hardwired by the given layout of the printed circuit board (PCB) to set the ANY-OUT voltage. As with the adjustable operation, the output voltage is set according to Equation 5 except that R1 and R2 are internally integrated and matched for higher accuracy. Tying any of the ANY-OUT pins to SNS can increase the resolution of the internal feedback network by lowering the value of R1. See the Section 8.1.10 section for additional information.

Equation 5. VOUT = VNR/SS × (1 + R1 / R2)
Note:

For output voltages greater than 3.95 V, use a traditional adjustable configuration (see the Section 8.1.12 section).

Table 8-3 User-Configurable Output Voltage Settings
VOUT(NOM)
(V)
50mV 100mV 200mV 400mV 800mV 1.6V VOUT(NOM)
(V)
50mV 100mV 200mV 400mV 800mV 1.6V
0.80 Open Open Open Open Open Open 2.40 Open Open Open Open Open GND
0.85 GND Open Open Open Open Open 2.45 GND Open Open Open Open GND
0.90 Open GND Open Open Open Open 2.50 Open GND Open Open Open GND
0.95 GND GND Open Open Open Open 2.55 GND GND Open Open Open GND
1.00 Open Open GND Open Open Open 2.60 Open Open GND Open Open GND
1.05 GND Open GND Open Open Open 2.65 GND Open GND Open Open GND
1.10 Open GND GND Open Open Open 2.70 Open GND GND Open Open GND
1.15 GND GND GND Open Open Open 2.75 GND GND GND Open Open GND
1.20 Open Open Open GND Open Open 2.80 Open Open Open GND Open GND
1.25 GND Open Open GND Open Open 2.85 GND Open Open GND Open GND
1.30 Open GND Open GND Open Open 2.90 Open GND Open GND Open GND
1.35 GND GND Open GND Open Open 2.95 GND GND Open GND Open GND
1.40 Open Open GND GND Open Open 3.00 Open Open GND GND Open GND
1.45 GND Open GND GND Open Open 3.05 GND Open GND GND Open GND
1.50 Open GND GND GND Open Open 3.10 Open GND GND GND Open GND
1.55 GND GND GND GND Open Open 3.15 GND GND GND GND Open GND
1.60 Open Open Open Open GND Open 3.20 Open Open Open Open GND GND
1.65 GND Open Open Open GND Open 3.25 GND Open Open Open GND GND
1.70 Open GND Open Open GND Open 3.30 Open GND Open Open GND GND
1.75 GND GND Open Open GND Open 3.35 GND GND Open Open GND GND
1.80 Open Open GND Open GND Open 3.40 Open Open GND Open GND GND
1.85 GND Open GND Open GND Open 3.45 GND Open GND Open GND GND
1.90 Open GND GND Open GND Open 3.50 Open GND GND Open GND GND
1.95 GND GND GND Open GND Open 3.55 GND GND GND Open GND GND
2.00 Open Open Open GND GND Open 3.60 Open Open Open GND GND GND
2.05 GND Open Open GND GND Open 3.65 GND Open Open GND GND GND
2.10 Open GND Open GND GND Open 3.70 Open GND Open GND GND GND
2.15 GND GND Open GND GND Open 3.75 GND GND Open GND GND GND
2.20 Open Open GND GND GND Open 3.80 Open Open GND GND GND GND
2.25 GND Open GND GND GND Open 3.85 GND Open GND GND GND GND
2.30 Open GND GND GND GND Open 3.90 Open GND GND GND GND GND
2.35 GND GND GND GND GND Open 3.95 GND GND GND GND GND GND