Wide bandwidth linear regulators suffer from an undesirable excessive overshooting of the output voltage during restart events that occur when the C_NR/SS and C_OUT capacitors are not fully discharged. In this device, and as shown in Figure 8-1, this undesirable behavior is mitigated by implementing low hysteresis circuitry consisting of two ORed comparators to detect when the input voltage is either 20 mV (typical) lower than the V_NR/SS reference voltage or 300 mV (typical) lower than V_OUT.

Figure 8-1 Overshoot Prevention Circuit

When the device is operating in dropout, transient events (such as an input voltage brownout, heavy load transient, or short-circuit event) can force the device in a reversed bias condition where the input voltage is either 20 mV (typical) lower than the V_NR/SS reference voltage or 300 mV (typical) lower than V_OUT. The output overshoot prevention circuit can be triggered, as shown in Figure 8-2, thus forcing the device to shutdown and restart, thereby preventing output voltage overshoot. If the device is still operating in dropout and the error condition that triggered this circuit is still present, an additional restart can occur until these conditions are removed or the device is no longer in dropout. The restart always occurs from a discharged state and always has the same characteristics as the initial LDO power-up, so the start-up time, V_OUT ramp rate, and V_OUT monotonicity are all predictable.

Figure 8-2 Device Behavior in Dropout

Figure 8-3 and Figure 8-4 show examples of a soft brownout and a brownout event, respectively.

The brownout overshoot is present with higher V_IN slew rates. A 1-V/μs slew rate was used in Figure 8-5.

Figure 8-3 Example: Soft Brownout to V_NR/SS

Figure 8-5 Example: Brownout With Overshoot Recovery

Figure 8-4 Example: Brownout

The overshoot prevention circuit is implemented to provide a predictable start-up and shutdown of the device without output overshoot if the EN_UV external UVLO is not used as described in this section. This circuit can be prevented from triggering by:

1. Using an input supply capable of handling heavy load transients or a larger value input capacitor
2. Increasing the operating headroom between V_IN and V_OUT (for example, when using a battery as an input supply to make sure that V_IN stays higher than V_OUT even when the battery is near the full discharge state)
3. Using an input supply with a ramp rate faster than the set output voltage time constant formed by C_NR/SS || R_NR/SS
4. Discharging the input supply slower than the discharge time formed by C_OUT || (Load || R_PULLDOWN) or by the C_NR/SS || (R_NR/SS || R_{PULLDOWN_NR/SS})