ZHCSG47C February 2017 – December 2022
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Device Enable (EN)
- 7.3.2 Adjustable Power-Good Threshold (PG, PGADJ)
- 7.3.3 Adjustable Power-Good Delay Timer (DELAY)
- 7.3.4 Undervoltage Shutdown
- 7.3.5 Current Limit
- 7.3.6 Thermal Shutdown
- 7.3.7
Integrated Watchdog
- 7.3.7.1 Window Watchdog (WTS, ROSC, FSEL and WRS)
- 7.3.7.2 Standard Watchdog (WTS, ROSC and FSEL)
- 7.3.7.3 Watchdog Service Signal and Watchdog Fault Outputs (WD and WDO)
- 7.3.7.4 ROSC Status Detection (ROSC)
- 7.3.7.5 Watchdog Enable (PG and WD_EN)
- 7.3.7.6 Watchdog Initialization
- 7.3.7.7 Window Watchdog Operation (WTS = Low)
- 7.3.7.8 Standard Watchdog Operation (WTS = High)
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
7.3.7.3 Watchdog Service Signal and Watchdog Fault Outputs (WD and WDO)
The watchdog service signal (WD) must stay high for at least 100 µs. The WDO pin is the fault output terminal and is tied high through a pullup resistor to a regulated output supply. When a watchdog fault occurs, the devices momentarily pull WDO low for a duration of t(WD_HOLD).
Equation 12. 