SWCS059I March   2011  – November 2014 TPS80032

PRODUCT PREVIEW Information. Product in design phase of development. Subject to change or discontinuance without notice.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Terminal Configuration and Functions
    1. 3.1 Pin Diagram
    2. 3.2 Pin Attributes
  4. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Handling Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Characteristics for YFF Package
    5. 4.5 Electrical Characteristics
      1. 4.5.1  Switched-Mode Regulators
      2. 4.5.2  LDO Regulators
      3. 4.5.3  Reference Generator
      4. 4.5.4  Crystal Oscillator
      5. 4.5.5  RC Oscillators
      6. 4.5.6  CLK32KAUDIO Buffer
      7. 4.5.7  Backup Battery Charger
      8. 4.5.8  Switched-Mode System Supply Regulator
      9. 4.5.9  Battery Charger
      10. 4.5.10 Indicator LED Driver
      11. 4.5.11 USB OTG
      12. 4.5.12 Gas Gauge
      13. 4.5.13 GPADC
      14. 4.5.14 Thermal Monitoring
      15. 4.5.15 System Control Thresholds
      16. 4.5.16 Current Consumption
      17. 4.5.17 Digital Input Signal Electrical Parameters
      18. 4.5.18 Digital Output Signal Electrical Parameters
      19. 4.5.19 Digital Output Signal Timing Characteristics
    6. 4.6 Typical Characteristics
  5. 5Detailed Description
    1. 5.1  Real-Time Clock
    2. 5.2  Clocks
    3. 5.3  Power Management
      1. 5.3.1 Finite State Machine (FSM)
      2. 5.3.2 Hardware Events
      3. 5.3.3 Software Events
      4. 5.3.4 Resource Definition
      5. 5.3.5 Resource Operating Modes
        1. 5.3.5.1 Voltage Regulator Operating Modes (All Types)
        2. 5.3.5.2 REGEN1 / REGEN2 / SYSEN Operating Modes
        3. 5.3.5.3 SMPS Operating Modes
        4. 5.3.5.4 Main Bandgap Operating Modes
        5. 5.3.5.5 Comparators Operating Modes
        6. 5.3.5.6 Hot-die Warning Operating Modes
        7. 5.3.5.7 Clocks and PWM1 / PWM2 Drivers Operating Modes
      6. 5.3.6 Addressing Resources Registers
        1. 5.3.6.1 State Register (CFG_STATE)
        2. 5.3.6.2 State Mapping Register (CFG_TRANS)
        3. 5.3.6.3 Voltage Register (CFG_VOLTAGE)
        4. 5.3.6.4 Force Register (CFG_FORCE)
        5. 5.3.6.5 Step Register (CFG_STEP)
      7. 5.3.7 Power Management I/Os Functionality
        1. 5.3.7.1 BOOT[2:0]
        2. 5.3.7.2 PWRON
        3. 5.3.7.3 RPWRON
        4. 5.3.7.4 REGEN1, REGEN2
        5. 5.3.7.5 SYSEN
      8. 5.3.8 PREQ1, PREQ2, PREQ3 Hardware Commands
      9. 5.3.9 DVS Software Commands
    4. 5.4  Reset System
      1. 5.4.1 Warm Reset (NRESWARM)
      2. 5.4.2 Primary Watchdog Reset
      3. 5.4.3 Thermal Shutdown
      4. 5.4.4 NRESPWRON
    5. 5.5  System Control
    6. 5.6  System Voltage/Battery Comparator Thresholds
    7. 5.7  Power Resources
      1. 5.7.1 Short-Circuit Protection
      2. 5.7.2 SMPS Regulators
        1. 5.7.2.1 Soft Start
        2. 5.7.2.2 Inductor Selection
        3. 5.7.2.3 Output Capacitor Selection
        4. 5.7.2.4 Input Capacitor Selection
        5. 5.7.2.5 SMPS1, SMPS2, SMPS5
        6. 5.7.2.6 SMPS3, SMPS4
      3. 5.7.3 LDO Regulators
        1. 5.7.3.1 VANA
        2. 5.7.3.2 VRTC, VBRTC
        3. 5.7.3.3 LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7
        4. 5.7.3.4 LDOLN, LDOUSB
    8. 5.8  Backup Battery Charger
    9. 5.9  Battery Charging
      1. 5.9.1  Charger and System Supply Regulator Controller Operation
        1. 5.9.1.1 Power Path with Hardware Controlled Charging
        2. 5.9.1.2 Power Path with Software Controlled Charging
        3. 5.9.1.3 Non-Power Path with Hardware Controlled Charging
        4. 5.9.1.4 Non-Power Path with Software Controlled Charging
      2. 5.9.2  System Supply Regulator
      3. 5.9.3  Battery Charging
        1. 5.9.3.1 Power Path Configuration
        2. 5.9.3.2 Non-Power Path Configuration
        3. 5.9.3.3 Preconditioning
        4. 5.9.3.4 Precharge Phase
        5. 5.9.3.5 Full-Charge Phase
        6. 5.9.3.6 Termination Current Detection
      4. 5.9.4  Anticollapse Loop and Supplement Mode
      5. 5.9.5  Battery Temperature Monitoring
      6. 5.9.6  Safety Timer and Charging Watchdog
      7. 5.9.7  Limit Registers
      8. 5.9.8  Battery Presence Detector
      9. 5.9.9  Indicator LED Driver
      10. 5.9.10 Supported Charging Sources
      11. 5.9.11 USB Suspend
      12. 5.9.12 Support for External Charging IC
      13. 5.9.13 Battery Charger Interrupts
        1. 5.9.13.1 Sources of the Interrupt
          1. 5.9.13.1.1 Charger Controller Interrupts
          2. 5.9.13.1.2 External Charger Interrupt
          3. 5.9.13.1.3 Internal Charger Interrupts
    10. 5.10 USB OTG
      1. 5.10.1 ID Line
      2. 5.10.2 VBUS Line
      3. 5.10.3 ADP on VBUS Line
    11. 5.11 Gas Gauge
      1. 5.11.1 Autocalibration
      2. 5.11.2 Auto-Clear and Pause
      3. 5.11.3 Dithering
      4. 5.11.4 Operation Guidelines
    12. 5.12 General-Purpose ADC
      1. 5.12.1 Real-Time Conversion Request (RT)
      2. 5.12.2 Asynchronous Conversion Request (SW)
      3. 5.12.3 BCM Internal Conversion Request
      4. 5.12.4 Calibration
    13. 5.13 Vibrator Driver and PWM Signals
    14. 5.14 Detection Features
    15. 5.15 Thermal Monitoring
      1. 5.15.1 Hot-Die Function
      2. 5.15.2 Thermal Shutdown
      3. 5.15.3 Temperature Monitoring with External NTC Resistor or Diode
    16. 5.16 I2C Interface
    17. 5.17 Secure Registers
    18. 5.18 Access Protocol
      1. 5.18.1 Single-Byte Access
      2. 5.18.2 Multiple-Byte Access to Several Adjacent Registers
    19. 5.19 Interrupts
  6. 6Recommended External Components
  7. 7Device and Documentation Support
    1. 7.1 Device Support
      1. 7.1.1 Development Support
      2. 7.1.2 Device Nomenclature
    2. 7.2 Community Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Export Control Notice
    6. 7.6 Glossary
    7. 7.7 Additional Acronyms
    8. 7.8 Detailed Revision History
  8. 8Mechanical Packaging and Orderable Information
    1. 8.1 Packaging Information

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7 Device and Documentation Support

7.1 Device Support

7.1.1 Development Support

TI offers an extensive line of development tools, including tools to evaluate the performance of the processors, generate code, develop algorithm implementations, and fully integrate and debug software and hardware modules. The tool's support documentation is electronically available within the Code Composer Studio™ Integrated Development Environment (IDE).

The following products support development of the TPS80032 device applications:

Software Development Tools: Code Composer Studio Integrated Development Environment (IDE): including Editor C/C++/Assembly Code Generation, and Debug plus additional development tools Scalable, Real-Time Foundation Software (DSP/BIOS™), which provides the basic run-time target software needed to support any TPS80032 device applications.

Hardware Development Tools: Extended Development System (XDS™) Emulator

7.1.2 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all microprocessors (MPUs) and support tools. Each device has one of three prefixes: X, P, or null (no prefix) (for example, TPS80032). Texas Instruments recommends two of three possible prefix designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development from engineering prototypes (TMDX) through fully qualified production devices and tools (TMDS).

Production devices and TMDS development-support tools have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.

Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.

TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type (for example, YFF) and the temperature range (for example, blank is the default commercial temperature range).

For orderable part numbers of TPS80032 devices in the YFF package types, see the Package Option Addendum of this document, the TI website (www.ti.com), or contact your TI sales representative.

7.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

    TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
    TI Embedded Processors Wiki Texas Instruments Embedded Processors Wiki. Established to help developers get started with Embedded Processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices.

7.3 Trademarks

Code Composer Studio, XDS, E2E are trademarks of Texas Instruments.

7.4 Electrostatic Discharge Caution

esds-image

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

7.5 Export Control Notice

Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled product restricted by other applicable national regulations, received from disclosing party under nondisclosure obligations (if any), or any direct product of such technology, to any destination to which such export or re-export is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S. Department of Commerce and other competent Government authorities to the extent required by those laws.

7.6 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

7.7 Additional Acronyms

Additional acronyms used in this data sheet are described below.

TERM DEFINITION
ADC Analog-to-Digital Converter
IC Integrated Circuit
I2C/I2C Inter-IC Control Bus
LDO Low Dropout Voltage Regulator
LSB Least-Significant Bit
MSB Most-Significant Bit
PFM Pulse Frequency Modulation
PWM Pulse Width Modulation
RTC Real-Time Clock

7.8 Detailed Revision History

VERSION DATE NOTES
* 03/2010 See (1).
A 06/2011 See (2).
B 09/2011 See (3).
C 11/2011 See (4).
D 12/2011 See (5).
E 02/2012 See (6).
F 04/2012 See (7).
G 08/2012 See (8).
H 08/2012 See (9).
I 11/2014 See (10).
(1) SWCS059, TPS80032 Data Manual: Initial release
(2) SWCS059A: Update
  • Table 4-10, Boost mode for VBUS voltage generation: IBO1 and IBLIMIT updated.
  • Long Key Press (PWRON), OTP memory bit to generate startup after shutdown.
  • Table Table 6-1, S2, R10, and C40 updated.
  • PCB Placement and Routing Guidelines chapter removed, there will be a separate Application Note.
  • updated.
  • Section 5.19, second paragraph updated.
  • Section 5.4.1 updated.
  • Section 5.7.2, last paragraph updated.
  • Section 5.9 updated.
  • USB ID resistance detection figure added, Figure 5-25.
  • USB ID resistance detection table added, Table 5-1.
  • Caution added to short-circuit protection chapter, Section 5.7.1.
  • Major updates in Battery Charging chapter Section 5.9.
  • Updated .
  • Recommended SMPS External Components updated, Table 6-1.
  • LDOUSB 3.3 V output voltage levels updated, Table 4-4.
  • GPADC INL error for GPADC_IN14 added, Section 4.5.13.
  • GPADC channel scaler changed to input voltage range, Section 5.12.3.
  • Thermal characteristics updated, Section 8.1.
(3) SWCS059B: Update
  • Update : CHRG_CSOUT connection when not used.
  • Update Section 1.1: Battery voltage range from 2.5 to 5.5 V.
  • Typo corrected Section 4.5.1: TLDR for SMPS2 and SMPS5 swapped.
  • Typo corrected Section 4.5.1: IQ for SMPS2 and SMPS5 swapped.
  • Update Section 5.9: Example of external charger changed to BQ24159.
  • Update Section 4.5.11: Several parameters added into Pullup and Pulldown Resistors chapter.
  • Update Section 4.5.1: IQ for SMPS1 added.
  • Update Section 4.5.1: VINP, VINF, and MinDOV clarified.
  • Update Section 4.5.13: Offset from +/–9 LSB to +/–36 LSB.
  • Update Table 5-2: Nonsaturated input voltage range added.
  • Update Section 5.10.3 and Figure 5-29: VBUS_IADP_SRC operation during ADP probing.
  • Update Section 5.9.13.1.3: Warning about thermal regulation loop operation added.
  • Update Section 5.7.2.2: Inductor value for optimized operation.
  • Update Table 6-1: C13 and L9 updated.
  • Update Section 5.7.2: Numerous parameters updated.
  • Update Figure 4-1: SMPS1 efficiency curve updated.
  • Update Table 5-2: Table notes added and VBUS and VAC range updated.
  • Update Table 4-15: Channel 11 offset from +/–20 to +/–36 LSB.
  • Update Table 4-4: LDO's minimum PSRR updated.
  • Update : CTLI2C_SCL, CTLI2C_SDA, DVSI2C_SCL, and DVSI2C_SDA pull-up resistor range changed (new value is 1.46 k to 7.4 k).
  • Update Section 5.7.2.5: 3-A and 5-A mode clarified for SMPS1.
  • Update : Ordering information updated.
  • Update Section 4.5.16: Condition for WAIT-ON current clarified.
  • Update Table 4-10: Boost mode quiescent current updated to 5 mA.
  • Update Section 5.9.4: VBUS anticollapse sensing point clarified.
  • Update Table 4-1: Additional points for SMPS2 dropout voltage added.
  • Update Figure 4-3.
(4) SWCS059C: Update
(5) SWCS059D: Update
  • Update Section 8.1: MSL Peak Temp added.
  • Update Table 5-2: Performance range of CH11 and CH17 updated.
  • Update Tablenote: Note updated for the result's coding.
  • Update Table 4-1: SMPS1 turn off time with 44 F output capacitance, SMPS1 on ground current and SMPS2 DCLDR updated.
  • Update Figure 5-12: Min. VICHRG level changed from 0.3 A to 0.1 A and VSYSMIN_HI replaced by VBATMIN_HI.
  • Update Section 5.6: Note about system voltage level and regulator's dropout requirements added.
  • Update Tablenote, Section 5.9.3.4, Section 5.9.3.5, Section 5.9.3.6: Battery charging and termination current depends on sense resistor Rsense or RSNS.
  • Update Section 5.9.3.6: Termination current described.
  • Update Section 5.9.13.1.3: Note for TMREG bit added.
  • Update Section 5.4.2: The HOLD_WDG_INSLEEP register bit described.
  • Update Table 4-1: SMPS overshoot changed from max. 10% to max. 100 mV, SMPS1's (3-A mode) DCLDR updated.
  • Update Section 4.5.13: GPADC_VREF output current capability and source resistance specified.
  • Update Section 4.5.2: LDO1's PSRR updated.
  • Update Section 4.5.8: System supply regulator's DMAX specified.
  • Update Section 5.9.12: Priority between VBUS and VAC clarified.
  • Update Table 5-3: Equation for channel 17 added.
  • Update Figure 1-1, Table 6-1: Capacitor C45 added.
  • Update : Pullup and pulldown resistors clarified; fixed, programmable, default.
  • Update Section 5.9.3.1: Note added.
  • Update Table 4-10: IIN_LIMIT max increased to 2250 mA.
  • Update Table 4-1: RV measured with 20-MHz LPF.
  • Update Section 5.1: Alarm and Timer interrupts clarified.
  • Update : Ordering information updated.
  • Update Section 5.9.4: Operation clarified and figure added.
(6) SWCS059E: Update
  • Update Table 4-10: (System Supply Regulator, PWM) MOSFET on-resistances updated.
  • Update Table 4-10: CBOOT value updated from 10nF to 100nF.
  • Update Table 5-3: X1 and X2 values updated for channel 10.
  • Update Table 4-15: GPADC_IN3 current source values updated.
  • Update Table 5-2: Input voltage performance range updated for channel 8.
  • Update Table 4-10: Output voltage for full charge mode, typo corrected (VBAT instead of VSYS).
  • Update Table 4-13: External ID resistances added.
  • Update Figure 5-29: Figure updated.
  • Update Section 5.3: Major updates in the chapter.
  • Update Section 5.4: Some updates in the chapter.
  • Update Table 4-11: Threshold error and comparator offset updated for Battery Temperature Measurement.
  • Update Table 4-15: Offset, gain error, INL, GPADC_IN0 current levels updated.
  • Update Table 4-2: Switching frequency updated.
  • Update Table 4-11: A range of ΔLIN updated.
  • Update Section 5.9.12: Figure added, description clarified.
  • Update Section 5.9.3.1: Figure added, description clarified.
  • Update Figure 5-24: Figure updated.
  • Update Figure 5-22: Figure added.
  • Update: Boot sequence figure removed.
  • Update: Chapter "Group and Subsystem Groups Power States" removed.
  • Update Section 5.3.7.3: Shutdown generation added.
(7) SWCS059F: Update
  • Update Table 4-4, Section 5.7.3.2: VBRTC electrical parameters added and control clarified.
  • Update (2): Note for 100 nF capacitor requirement with over 20 kΩ source impedance added.
  • Update and .
  • Update Table 4-15: GPADC_VREF output impedance spec removed. GPADC_IN0 current source spec updated.
  • Update Figure 5-7, Figure 5-8, Figure 5-9, Figure 5-10: Text clarified in the flowcharts.
  • Update : RSNS and Rsense replaced by R2 and R9 for clarification.
  • Update Section 5.9.6: Description added that system supply regulator operates after watchdog or safety timer expires.
  • Update Section 5.9.3.1: Caution about resistor R2 usage added.
  • Update Table 4-11: VBAT_FULLCHRG parameters added.
  • Update Table 4-17: VSYSMIN_HI and VSYSMIN_LO thresholds added.
  • Update Section 4.5.8: VBUS and VAC detection thresholds updated.
(8) SWCS059G: Update
  • Update Table 4-4, Section 5.7.3.2: VBRTC electrical parameters added and control clarified.
  • Update (2): Note for 100 nF capacitor requirement with over 20 kΩ source impedance added.
  • Update and .
  • Update Table 4-15: GPADC_VREF output impedance spec removed. GPADC_IN0 current source spec updated.
  • Update Figure 5-7, Figure 5-8, Figure 5-9, Figure 5-10: Text clarified in the flowcharts.
  • Update : RSNS and Rsense replaced by R2 and R9 for clarification.
  • Update Section 5.9.6: Description added that system supply regulator operates after watchdog or safety timer expires.
  • Update : Section 5.9.3.1: Caution about resistor R2 usage added.
  • Update Table 4-11: VBAT_FULLCHRG parameters added.
  • Update Table 4-17: VSYSMIN_HI and VSYSMIN_LO thresholds added.
  • Update Section 4.5.8: VBUS and VAC detection thresholds updated.
  • Update Section 5.11.4: Warning about RC-filtering added.
  • Update Section 5.9: Note about the terminology of different charging sources added.
(9) SWCS059H: Update
  • Update : Ordering information updated.
  • Update : ESD Specification updated.
(10) Changed data sheet to standard TI format
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