8.3.11.4 Analog and PWM Dimming - Normalized Results and Comparison

When the PWM applied signal is less than the switching cycle period and falls during an OFF-time it has no impact on the current for that cycle as the switch is already OFF. This situation can be avoided by increasing the switching frequency. Shunt FET PWM dimming avoids this issue. Current adjustment that maintains a constant ripple when shunted (see the OFF-Timer, Shunt FET Dimming or Shunted Output Condition section), creates a linear relation to the PWM shunt FET duty cycle and the average output current. Shunt FET PWM dimming can out-perform PWM dimming as characterized in Figure 27 through Figure 29, but is more complicated to implement.

Another impact on linearity can occur when using the analog dimming function. Discontinuous conduction mode (DCM) occurs when the inductor current reaches 0 A during each cycle,. When the device enters DCM, the output current is no longer the peak current minus half the ripple. The linear range can be extended by lowering the ripple, ΔI_L-PP. If the system is being digitally controlled, the applied IADJ pin voltage can be adjusted when it is known the DCM operation occurs. In either case, a lower limit is eventually reached when the measured peak threshold voltage is approximately < 50 mV. At this point, the offset error becomes a significant portion of the peak current trip point voltage being measured.

Figure 27. PWM Dimming Performance with Shunt Dim Comparison

VLED = 15 V

VIN = 55 V

Figure 29. Analog Dimming Performance (Log Scale)

VLED = 15 V

VIN = 55 V

Figure 28. Analog Dimming Performance