SLUSE50 November 2023 TPS92642-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1 Internal Regulator
- 6.3.2 Buck Converter Switching Operation
- 6.3.3 Bootstrap Supply
- 6.3.4 Switching Frequency and Adaptive On-Time Control
- 6.3.5 Minimum On-Time, Off-Time, and Inductor Ripple
- 6.3.6 LED Current Regulation and Error Amplifier
- 6.3.7 Start-Up Sequence
- 6.3.8 Analog Dimming and Forced Continuous Conduction Mode
- 6.3.9 External PWM Dimming and Input Undervoltage Lockout (UVLO)
- 6.3.10 Pulse Duty Cycle Limit Circuit
- 6.3.11 Output Short and Open-Circuit Faults
- 6.3.12 Overcurrent Protection
- 6.3.13 Thermal Shutdown
- 6.3.14 Fault Indicator and Diagnostics Summary
- 6.4 Device Functional Modes
-
7 Application and Implementation
- 7.1
Application Information
- 7.1.1 Duty Cycle Considerations
- 7.1.2 Switching Frequency Selection
- 7.1.3 LED Current Programming
- 7.1.4 Inductor Selection
- 7.1.5 Output Capacitor Selection
- 7.1.6 Input Capacitor Selection
- 7.1.7 Bootstrap Capacitor Selection
- 7.1.8 Compensation Capacitor Selection
- 7.1.9 Input Dropout and Undervoltage Protection
- 7.1.10 Pulse Duty Cycle Limit Circuit
- 7.1.11 Protection Diodes
- 7.2
Typical Application
- 7.2.1 Design Requirements
- 7.2.2
Detailed Design Procedure
- 7.2.2.1 Calculating Duty Cycle
- 7.2.2.2 Calculating Minimum On-Time and Off-Time
- 7.2.2.3 Minimum Switching Frequency
- 7.2.2.4 LED Current Set Point
- 7.2.2.5 Inductor Selection
- 7.2.2.6 Output Capacitor Selection
- 7.2.2.7 Bootstrap Capacitor Selection
- 7.2.2.8 Compensation Capacitor Selection
- 7.2.2.9 VIN Dropout Protection and PWM Dimming
- 7.2.3 Application Curves
- 7.3 Power Supply Recommendations
- 7.4 Layout
- 7.1
Application Information
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
6.3.6 LED Current Regulation and Error Amplifier
The reference voltage, VIADJ, set by the VIADJ and is internally scaled by a gain factor of 1/14 through a resistor network. An internal rail-to-rail error amplifier generates an error signal proportional to the difference between the scaled reference voltage (VIADJ / 14) and the inductor current measured by the differential voltage drop between CSP and CSN, V(CSP-CSN). This error drives the COMP pin voltage, VCOMP, and directly controls the valley threshold of the inductor current. Zero average DC error and closed-loop regulation is achieved by implementing an integral compensation network consisting of a capacitor connected from the output of the error amplifier to GND. As a good starting point, TI recommends a capacitor value between 1 nF and 10 nF between the COMP pin and GND. The choice of compensation network must ensure a minimum of 60° of phase margin and 10 dB of gain margin.
Figure 6-3 Closed-Loop LED Current
RegulationLED current is dependent on the current sense resistor, RCS. Use Equation 17 to calculate the LED current.
TI recommends a Schottky diode connected from PGND to SW placed close to the device for LED current greater than 4-A and operating frequency is above 1-MHz. The diode reduces the impact of high frequency noise on PGND from impacting the valley detection circuit. The diode only conducts for a brief period of time and hence the impact on efficiency is negligible.
Figure 6-4 Switch node Schottky diode
connectionLED current accuracy is a function of the tolerance of the external sense resistor, RCS, and the variation in the sense threshold, V(CSP-CSN), caused by internal mismatch and temperature dependency of the analog components. The TPS92642-Q1 incorporates low offset rail-to-rail amplifiers, and is capable of achieving LED current accuracy of ±4% over common-mode range and a junction temperature range of –40°C to 150°C.