SLUSE50 November   2023 TPS92642-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Internal Regulator
      2. 6.3.2  Buck Converter Switching Operation
      3. 6.3.3  Bootstrap Supply
      4. 6.3.4  Switching Frequency and Adaptive On-Time Control
      5. 6.3.5  Minimum On-Time, Off-Time, and Inductor Ripple
      6. 6.3.6  LED Current Regulation and Error Amplifier
      7. 6.3.7  Start-Up Sequence
      8. 6.3.8  Analog Dimming and Forced Continuous Conduction Mode
      9. 6.3.9  External PWM Dimming and Input Undervoltage Lockout (UVLO)
      10. 6.3.10 Pulse Duty Cycle Limit Circuit
      11. 6.3.11 Output Short and Open-Circuit Faults
      12. 6.3.12 Overcurrent Protection
      13. 6.3.13 Thermal Shutdown
      14. 6.3.14 Fault Indicator and Diagnostics Summary
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Duty Cycle Considerations
      2. 7.1.2  Switching Frequency Selection
      3. 7.1.3  LED Current Programming
      4. 7.1.4  Inductor Selection
      5. 7.1.5  Output Capacitor Selection
      6. 7.1.6  Input Capacitor Selection
      7. 7.1.7  Bootstrap Capacitor Selection
      8. 7.1.8  Compensation Capacitor Selection
      9. 7.1.9  Input Dropout and Undervoltage Protection
      10. 7.1.10 Pulse Duty Cycle Limit Circuit
      11. 7.1.11 Protection Diodes
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Calculating Duty Cycle
        2. 7.2.2.2 Calculating Minimum On-Time and Off-Time
        3. 7.2.2.3 Minimum Switching Frequency
        4. 7.2.2.4 LED Current Set Point
        5. 7.2.2.5 Inductor Selection
        6. 7.2.2.6 Output Capacitor Selection
        7. 7.2.2.7 Bootstrap Capacitor Selection
        8. 7.2.2.8 Compensation Capacitor Selection
        9. 7.2.2.9 VIN Dropout Protection and PWM Dimming
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Compact Layout for EMI Reduction
          1. 7.4.1.1.1 Ground Plane
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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Internal Regulator

The TPS92642-Q1 incorporates a 36-V rated linear regulator to generate the 5-V (typical) VCC bias supply and other internal reference voltages. The VCC output is monitored internally to by a UVLO circuit. Operation is enabled when VCC exceeds the VCC(UVLO) rising threshold and is disabled when VCC drops below VCC(UVLO) falling threshold. The comparator provides 200 mV of hysteresis to avoid chatter during transitions. The VCC UVLO thresholds are internally fixed and cannot be adjusted. An internal current limit circuit is implemented to protect the device during VCC pin short-circuit conditions. The VCC supply powers the internal circuitry, the low-side gate driver and the bootstrap supply for high-side gate driver. Place a bypass capacitor (4.7 μF to 10 μF) between VCC pin and AGND as close to the device as possible. The capacitor must be five times larger than the bootstrap capacitor, CBST to support proper operation. The regulator operates in dropout when input voltage, VIN, falls below 5 V, forcing VCC to be lower than VIN by VDO for a 20-mA supply current. The VCC is a regulated output of the internal regulator and is not recommended to be driven from an external power supply.