The TPS92643-Q1 incorporates a 36-V input voltage rated linear regulator to generate the 5-V (typical) V_CC bias supply and other internal reference voltages. The device monitors the V_CC output to implement UVLO protection. Operation is enabled when V_CC exceeds the V_CC(UVLO) rising threshold and is disabled when V_CC drops below V_CC(UVLO) falling threshold. The comparator provides 200 mV of hysteresis to avoid chatter during transitions. The V_CC UVLO thresholds are internally fixed and cannot be adjusted. An internal current limit circuit is implemented to protect the device during VCC pin short-circuit conditions. The V_CC supply powers the internal circuitry, the low-side gate driver and the bootstrap supply for high-side gate driver. Place a bypass capacitor in the range of 4.7 μF to 10 μF close to the device, across the VCC pin to AGND. The capacitor from VCC must be five times larger than the bootstrap capacitor, C_BST to support proper operation. The regulator operates in dropout when input voltage, V_IN falls below 5 V, forcing V_CC to be lower than V_IN by V_DO for a 20-mA supply current. The V_CC is a regulated output of the internal regulator and is not recommended to be driven from an external power supply.