10.1 Layout Guidelines

• The performance of the switching regulator depends as much on the layout of the PCB as the component selection. Following a few simple guidelines will maximize noise rejection and minimize the generation of EMI within the circuit.
• Discontinuous currents are the most likely to generate EMI. Therefore, take care when routing these paths. The main path for discontinuous current in the TPS92691/-Q1 Buck regulator contains the input capacitor, C_IN, the recirculating diode, D, the N-channel MOSFET, Q1, and the sense resistor, R_IS. In the TPS92691/-Q1 Boost regulator, the discontinuous current flows through the output capacitor C_OUT, diode, D, N-channel MOSFET, Q1, and the current sense resistor, R_IS. In Buck-Boost regulator, both loops are discontinuous and should be carefully laid out. These loops should be kept as small as possible and the connection between all the components should be short and thick to minimize parasitic inductance. In particular, the switch node (where L, D, and Q1 connect) should be just large enough to connect the components. To minimize excessive heating, large copper pours can be placed adjacent to the short current path of the switch node.
• CSP and CSN traces should be routed together with Kelvin connections to the current sense resistor as short as possible. If needed, use common mode and differential mode noise filters to attenuate switching and diode reverse recovery noise from affecting the internal current sense amplifier.
• The COMP, IS, OVP, PWM, and IADJ pins are all high-impedance inputs that couple external noise easily; therefore, the loops containing these nodes should be minimized whenever possible.
• In some applications, the LED or LED array can be far away from the TPS92691/-Q1, or on a separate PCB connected by a wiring harness. When an output capacitor is used and the LED array is large or separated from the rest of the regulator, the output capacitor should be placed close to the LEDs to reduce the effects of parasitic inductance on the AC impedance of the capacitor.
• The TPS92691/-Q1 has an exposed thermal pad to aid power dissipation. Adding several vias under the exposed pad helps conduct heat away from the device. The junction-to-ambient thermal resistance varies with application. The most significant variables are the area of copper in the PCB and the number of vias under the exposed pad. The integrity of the solder connection from the device exposed pad to the PCB is critical. Excessive voids greatly decrease the thermal dissipation capacity.

10.2 Layout Example

Figure 45. Layout Recommendation