ZHCSLS0B July 2022 – April 2024 TPS929240-Q1
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
In ADC auto scan mode, If the MAXOUT channel is selected by writing 06h to ADCCHSEL, the maximum voltage of OUTXn is recorded into ADC_OUT register. The maximum channel output voltage is available after at least nine output PWM cycles are completed. The ADC measures every three outputs as one group when the group is turned on and move to measure the next group in next PWM dimming cycle until all eight groups are completed no matter in PWM dimming mode or phase shift PWM dimming mode. The device sets FLAG_ADCDONE to 1 and stops ADC auto scan after the measurements for all eight groups are done. The FLAG_ADCDONE is cleared to 0 by reading the ADC_OUT, and ADC auto scan restarts again if the data of ADCCHSEL is still 06h. FLAG_ADCDONE is also cleared to 0 by writing ADCCHSEL register, and ADC restarts after FLAG_ADCDONE is cleared. The minimum current pulse for each output must be longer than t(BLANK) + 3 × t (CONV) in auto scan mode. The channel is skipped if it is disabled in auto scan mode.
Based on the measured maximum output voltage and supply voltage, the microcontroller is able to regulate supply voltage from previous power stage to minimize the power consumption on the TPS929240-Q1. Basically, the microcontroller must program the output voltage of previous power stage to be just higher than the measured maximum channel output voltage plus the required dropout voltage V(OUT_drop) of the TPS929240-Q1. In this way, the TPS929240-Q1 takes minimum power consumption, and overall power efficiency optimizes.