ZHCSLS0B July 2022 – April 2024 TPS929240-Q1
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The TPS929240-Q1 automatically reloads all EEPROM code into the corresponding configuration registers every time after entering the FAIL-SAFE state. The TPS929240-Q1 implements a EEPROM CRC check after loading the EEPROM code to configuration register in FAIL-SAFE state. The calculated CRC results are sent to register CALC_EEPCRC and compared to the data in EEPROM register EEPCRC, which stores the CRC code for all EEPROM registers except for DIM-R reserved register. The reserved DIM-R register value is not included in the EEPCRC calculation. The TPS929240-Q1 EEPROM configuration tool are available on ti.com to help calculate the EEPCRC value. If the code in register CALC_EEPCRC is not matched to the code in register EEPCRC, the TPS929240-Q1 turns off all channels output, pulls the ERR pin down with constant current sink to report the fault, and sets the registers including FLAG_EEPCRC and FLAG_ERR to 1. The CRC code for all the EEPROM registers must be burnt into EEPROM register EEPCRC in the end of production line. The CRC code algorithm is described in EEPROM CRC Error in NORMAL state.