ZHCSLS0B July 2022 – April 2024 TPS929240-Q1
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The device address byte, DEV_ADDR frame follows the SYNC frame. There are total 8 bits binary code in the device address byte. The below table provides detailed definition for each bit function. The DEVICE_ADDR register is required to set to 0000b for broadcast mode, otherwise the broadcast mode cannot be enabled. The broadcast mode is only effective for writing mode. The READ/WRITE bit must be 1 for broadcast mode.
BIT | FIELD | DESCRIPTION |
---|---|---|
3-0 | DEVICE_ADDR | Target device address |
5-4 | DATA_LENGTH | 00b: Single-byte mode with 1 byte of data; 01b: Bust mode with 4 bytes of data;
10b: Burst mode with 16 bytes of data; 11b: Burst mode with 24 bytes of data |
6 | BROADCAST | Broadcast mode. 1: Broadcast (DEVICE_ADDR =0000b); 0: Single-device only |
7 | READ/WRITE | Read / Write mode. 1: Write mode; 0: Read mode |