Due to the architecture of switched mode power supplies used to power the LED driver, there exist several current loops that can create interference. The best way to mitigate the effects of these loops is to minimize the area. Since the location of these loops is dependent on the LED drive architecture, the reader is referred to the data sheets of those parts for specific layout recommendation guidelines.

However, the TPS99000-Q1 does add an additional current loop which is specific to how it enables the LEDs in low brightness conditions. When operating the TPS99000-Q1 in discrete pulsed mode to achieve low light levels of LEDs, current flows through a shunt FET in the LED driver, creating a current loop that can inject noise into other circuits. The current loop is shown in Figure 9-1.

Figure 9-1 Discontinuous Mode Current Loop

Here, the net LED_COMMON_ANODE is at the forward voltage of the LED when it is conducting current, and LOW_SIDE_SENSE is at near ground potential. When forming pulses in discrete pulsed mode, the S_EN1 FET redirects the current from the LED, causing it to turn off quickly. This has the added effect of discharging the 1μF capacitor, creating a brief, high current loop consisting of the S_EN1 FET, the CMODE FET, and the 1μF capacitor. There is also a secondary loop created by the S_EN1 FET and the 0.1μF capacitor. This set of components should be placed in a way to keep these loops small. One such possible placement is shown in Figure 9-2.

Figure 9-2 High Power Layout