ZHCSN32B June 2019 – July 2024 TPS99001-Q1
PRODUCTION DATA
The TPS99001-Q1 has three serial interfaces that transmit data into and out of the device. All of these interfaces have a maximum clock speed of 30MHz. To help prevent high levels of EMI emissions, these signals should be laid out with impedance-matched, low-inductance traces. In particular, the three clocks for these interfaces should be low inductance, and if a cable or a connector is used, the clock signal should be adjacent to the ground signal return.
PIN | NAME | FUNCTION |
---|---|---|
27 | SPI1_CLK | Clock (30MHz) |
28 | SPI1_SS_Z | Secondary Select |
29 | SPI1_DOUT | Data |
30 | SPI1_DIN | Data |
PIN | NAME | FUNCTION |
---|---|---|
31 | SPI2_DIN | Data |
32 | SPI2_DOUT | Data |
33 | SPI2_SS_Z | Secondary Select |
34 | SPI2_CLK | Clock (up to 30MHz) |
PIN | NAME | FUNCTION |
---|---|---|
4 | ADC_MISO | Data |
5 | ADC_MOSI | Data |
17 | SEQ_CLK | Clock (30MHz) |
To avoid crosstalk, a PCB trace spacing requirement is suggested, such as the “3 W rule” which specifies that if the trace width is 5 mils, then traces should be spaced out at least 15 mils from center to center. On TI’s PCB design, the typical trace spacing was 20 mils.