ZHCSN32B June 2019 – July 2024 TPS99001-Q1
PRODUCTION DATA
The TPS99001-Q1 is an integral component of the DLP553x-Q1 and DLP462x-Q1 chipset, which also includes the DLPC23x-Q1 DMD display controller. The TPS99001-Q1 provides a high-voltage, high-precision, three-rail regulator to cost-effectively create DMD mirror control voltages (16V, 8.5V, –10V). A complete system power monitor and DMD mirror parking solution is included to increase system robustness and reduce cost. In addition, the TPS99001-Q1 includes numerous system monitoring and diagnostic features, such as configurable ADCs and watchdogs.
An integrated 12-bit ADC provides useful information about the operating condition of the system. Several external ADC channels are included for general usage (LED temperature measurement, and so on). One of the external ADC channels includes a differential input amplifier and is dedicated to LED current measurement. The DLPC23x-Q1 and TPS99001-Q1 ADC control blocks support up to 63 samples per video frame, with precise hardware alignment of samples to the DMD sequence timeline.
Two SPI buses are included. The first bus is intended for command and control, and the second is a read-only bus for optional redundant system condition monitoring. The SPI ports include support for byte-level parity checking.
Two windowed watchdog circuits are included to provide validation of DLPC23x-Q1 microprocessor operation and monitoring of DMD sequencer activity. The TPS99001-Q1 also includes on-die temperature threshold monitoring and a monitor circuit to validate the external clock ratio (of the SEQ_CLK) against an internal oscillator.