The TPS99001-Q1 provides two four-wire SPI ports that support transfers up to 30MHz clock rates. The primary port (SPI1) supports register reads and writes, and serves as the primary set up and control interface for the device. The DLPC23x-Q1 is the primary of SPI1 to control the TPS99001-Q1 during system operation. A secondary read-only four wire SPI port (SPI2) is available to provide status information to an optional second microcontroller in the system.

For both ports, the SPIx_SS_Z serves as the active low chip select for the SPI port. A SPI frame is initiated by SPIx_SS_Z pin going low, and is completed when SPIx_SS_Z pin is driven high.

The secondary SPI port serves as a read-only system monitor port. All registers in the address space are read accessible over this port. The protocol is effectively the same as the main port except for being read-only. Note that data is clocked in on the rising edge of the SPI2_CLK.

When using this port, one must always transmit the full transaction packet. Failure to do so may result in corruption of data.

Figure 6-7 SPI Port 2 Protocol (Read Only)