ZHCSN72 june 2023 TPSI2072-Q1
PRODUCTION DATA
9.2.3 Design Procedure - Chassis Ground Reference
Figure 9-11 Chassis Ground Reference RISO1, RISO2 Selection
In order to protect the TPSI2072-Q1, RISO1 and RISO2 must be sized to limit the current in an overvoltage condition. The amount of resistance required to protect the TPSI2072-Q1 depends on the amount of overvoltage applied. For example, during a dielectric withstand voltage test (HiPot) of 2850 V for 5 seconds, the S1 to SM voltage and the SM to S2 voltage will be clamped to 650 V (VAVA minimum) by the TPSI2072-Q1 and the RISO1, RISO2 resistances required to keep the current under 2 mA would be 1.1 MΩ.
If the high potential test lasts for 60 seconds, the RISO1, RISO2 resistances must be doubled to 2.2 MΩ to keep the current below 1 mA.
|
DC Overvoltage |
RISO1, ISO2 Minimum (5 second intervals) |
RISO1, RISO2 Minimum (60 second intervals) |
|---|---|---|
|
2000 V |
675 kΩ |
1350 kΩ |
|
2850 V |
1100 kΩ |
2200 kΩ |
|
3500 V |
1425 kΩ |
2850 kΩ |
|
4300 V |
1825 kΩ |
3650 kΩ |