The simplified circuit diagram shown in Figure 7-1 is a typical active pre-charge application using the TPSI31P1-Q1. The TPSI31P1-Q1 interfaces to a microcontroller residing on the primary side of the TPSI31P1-Q1. The external power inductor, L1, along with power diode, D1, and power FET, M1, form a buck converter topology. M2 is an optional power FET and allows for reverse blocking. M2 is statically enabled during pre-charge. The shunt resistor, R_SHUNT, is used to monitor the current in L1 by forming a voltage across IS+ relatively to VSSS.

With power applied to VDDP and CE high, the pre-charge cycle is initiated by asserting EN high. If IS+ is below VREF-, VDRV is asserted high by the TPSI31P1-Q1 to enable M1, which begins to store energy in L1.Once the current in L1 reaches its set peak level, which occurs when IS+ reaches VREF+, VDRV is asserted low to disable M1. At this point, stored energy in L1 is released into the capacitance, C_LINK. As the inductor current decreases, the voltage on IS+ falls to VREF-, and M1 is enabled again. This process continues throughout the entire pre-charge cycle.

The TPSI31P1-Q1 keeps VDRV asserted high upon pre-charge completion while EN state is high.

Figure 7-1 Typical Active Pre-Charge Application