The example below shows a cut-out from the layout of the MagPack evaluation module. To further reduce EMI, current loops are kept small and noisy traces kept short.

The same rules also apply to the layout with the SIL package. The pin-outs of both the SIL and the VCA package are optimized for short connections between the device and input or output capacitors. The copper keepout (only for the SIL package) is for top copper layer only. Other PCBs layers can enter this keepout.