ZHCSPT6D July 2023 – June 2024 TPSM8287A06 , TPSM8287A10 , TPSM8287A12 , TPSM8287A15
PRODUCTION DATA
The input capacitor buffers the input voltage for transient events and also decouples the converter from the supply. TI recommends a X7R multilayer ceramic capacitor (MLCC) for best filtering and must be placed between both VIN and GND pins, as close as possible to those pins. For applications with ambient temperatures below 85°C, a capacitor with X5R dielectric can be used. Ceramic capacitors have a DC-Bias effect, which has a strong influence on the final effective capacitance. Choose the right capacitor carefully in combination with considering the package size and voltage rating. The two high frequency input capacitors are placed inside the module to reduce EMI, shrink the overall design size and to simplify the board layout. As those integrated capacitors target high frequencies, additional external capacitors with a minimum of 5 µF are required per VIN pin.
The TPSM8287Axx devices feature a butterfly or parallel layout with two pairs of VIN and GND pins on opposite sides of the package. This feature allows the input capacitors to be placed symmetrically on the PCB so that the electromagnetic fields cancel each other out, thereby reducing EMI. In addition, the parasitic loop inductance between the input capacitors and the IC is reduced through this pinout.
The duty cycle of the converter is given by:
where:
The value of input capacitance needed to meet any system-level input voltage ripple requirement is given by Equation 42. For this example, the lowest input voltage and highest load current are used to generate a worst case input voltage ripple of 100 mV.
where:
The value of CIN calculated with Equation 42 is the effective capacitance after all derating, tolerance, and aging effects have been considered.