Layout is a critical portion of good power supply design. See Figure 7-19 for a PCB layout example. Key guidelines to follow for the layout are:
- Make VIN, PGND, and SW traces as wide as possible
to reduce trace impedance and improve heat
dissipation.
- Place a 10-nF to 100-nF capacitor at the VIN pin to PGND and place it as close
as possible to the device on the same side of the
PCB. Place the remaining ceramic input capacitance
next to these high frequency bypass capacitors.
The remaining input capacitance can be placed on
the other side of the board but use as many vias
as possible to minimize impedance between the
capacitors and the pins of the IC.
- Use multiple vias near the PGND pins and use the layer directly below the
device to connect them together. This action helps
to minimize noise and can help heat
dissipation.
- Use vias near the VIN pin and provide a low impedance connection between them
through an internal layer.
- Place the BP5 capacitor as close as possible to the BP5 and AGND pins.
- Place the bottom resistor in the FB divider as close as possible to the FB and
AGND pins of the IC. Also keep the upper feedback resistor and the feedforward capacitor
near the IC. Connect the FB divider to the output voltage at the desired point of
regulation.
- Use multiple vias in the AGND island to connect it back to internal PGND
layers. Do not place these vias between the BP5
capacitor and the AGND pin. These vias conduct
switching currents between the BP5 capacitor and
PGND. Placing the vias near the AGND pin can add
noise to the FB divider.
- Return the FSEL and MODE resistors to a quiet AGND island.