ZHCSPU3A October 2023 – December 2023 TPSM843320
PRODUCTION DATA
- 1
- 1 特性
- 2 应用
- 3 说明
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1 VIN Pins and VIN UVLO
- 6.3.2 Enable and Adjustable UVLO
- 6.3.3 Adjusting the Output Voltage
- 6.3.4 Switching Frequency Selection
- 6.3.5 Switching Frequency Synchronization to an External Clock
- 6.3.6 Ramp Amplitude Selection
- 6.3.7 Soft Start and Prebiased Output Start-Up
- 6.3.8 Mode Pin
- 6.3.9 Power Good (PGOOD)
- 6.3.10 Current Protection
- 6.3.11 Output Overvoltage and Undervoltage Protection
- 6.3.12 Overtemperature Protection
- 6.3.13 Output Voltage Discharge
- 6.4 Device Functional Modes
-
7 Application and Implementation
- 7.1 Application Information
- 7.2
Typical Applications
- 7.2.1
1.0-V Output, 1-MHz Application
- 7.2.1.1 Design Requirements
- 7.2.1.2
Detailed Design Procedure
- 7.2.1.2.1 Switching Frequency
- 7.2.1.2.2 Output Inductor Selection
- 7.2.1.2.3 Output Capacitor
- 7.2.1.2.4 Input Capacitor
- 7.2.1.2.5 Adjustable Undervoltage Lockout
- 7.2.1.2.6 Output Voltage Resistors Selection
- 7.2.1.2.7 Bootstrap Capacitor Selection
- 7.2.1.2.8 BP5 Capacitor Selection
- 7.2.1.2.9 PGOOD Pullup Resistor
- 7.2.1.2.10 Current Limit Selection
- 7.2.1.2.11 Soft-Start Time Selection
- 7.2.1.2.12 Ramp Selection and Control Loop Stability
- 7.2.1.2.13 MODE Pin
- 7.2.1.3 Application Curves
- 7.2.1
1.0-V Output, 1-MHz Application
- 7.3 Power Supply Recommendations
- 7.4 Layout
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
7.2.1.2.4 Input Capacitor
Input decoupling ceramic capacitors type X5R, X7R, or similar from VIN to PGND that are placed as close as possible to the IC are required. A total of at least 10 µF of capacitance is required and some applications can require a bulk capacitance. TI recommends at least 1 µF of bypass capacitance as close as possible to the VIN pin to minimize the input voltage ripple. A 0.1-µF to 1-µF capacitor must be placed as close as possible to VIN pin 10 on the same side of the board of the device to provide high frequency bypass to reduce the high frequency overshoot and undershoot on VIN and SW pins. The voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum RMS input current. The RMS input current can be calculated using Equation 12.
For this example design, a ceramic capacitor with at least a 16-V voltage rating is required to support the maximum input voltage. Three 10-µF, 0805, X7S, 25-V and one 0.1-μF, 0402, X7R 25-V capacitors in parallel have been selected to be placed the sides of the IC near the VIN and PGND pins. Based on the capacitor manufacturer's website, the total ceramic input capacitance derates to 8 µF at the nominal input voltage of 12 V. A 100-µF bulk capacitance is also used to bypass long leads when connected a lab bench top power supply.
The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 13. The maximum input ripple occurs when operating nearest to 50% duty cycle. Using the nominal design example values of Ioutmax = 3 A, CIN = 8 μF, and fSW = 1000 kHz, the input voltage ripple with the 12 V nominal input is 28 mV and the RMS input ripple current with the 4 V minimum input is 2.6 A.
