Input decoupling ceramic capacitors type X5R, X7R, or similar from VIN to PGND that are placed as close as possible to the IC are required. A total of at least 10µF of capacitance is required and some applications can require a bulk capacitance. TI recommends at least 1µF of bypass capacitance as close as possible to the VIN pin to minimize the input voltage ripple. A 0.1µF to 1-µF capacitor must be placed as close as possible to VIN pin 10 on the same side of the board of the device to provide high frequency bypass to reduce the high frequency overshoot and undershoot on VIN and SW pins. The voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum RMS input current. The RMS input current can be calculated using Equation 12.

For this example design, a ceramic capacitor with at least a 16V voltage rating is required to support the maximum input voltage. Three 10µF, 0805, X7S, 25V and one 0.1μF, 0402, X7R 25-V capacitors in parallel have been selected to be placed the sides of the IC near the VIN and PGND pins. Based on the capacitor manufacturer website, the total ceramic input capacitance derates to 8µF at the nominal input voltage of 12V. A 100µF bulk capacitance is also used to bypass long leads when connected a lab bench top power supply.

The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 13. The maximum input ripple occurs when operating nearest to 50% duty cycle. Using the nominal design example values of Ioutmax = 6A, C_IN = 8μF, and f_SW = 1000kHz, the input voltage ripple with the 12V nominal input is 57mV and the RMS input ripple current with the 4V minimum input is 5.2A.

Equation 12.

Equation 13.