ZHCSG68F
MARCH 2017 – JANUARY 2019
TPSM846C23
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
简化电路原理图
效率与输出电流间的关系
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Programmable Characteristics
6.8
Typical Characteristics (VIN = 12 V)
6.9
Typical Characteristics (VIN = 5 V)
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
PMBus
7.3.1.1
PMBus General Description
7.3.1.2
PMBus Address
7.3.1.3
PMBus Connections
7.3.1.4
Supported PMBus Commands
7.3.2
Minimum Capacitance Requirements
7.3.3
Setting the Compensation Network
7.3.4
Transient Response
7.3.5
Setting the Output Voltage via PMBus
7.3.6
Setting the Output Voltage Without PMBus
7.3.7
Differential Remote Sense
7.3.8
Voltage Reference
7.3.9
Switching Frequency and Synchronization
7.3.9.1
Setting the Switching Frequency
7.3.9.2
Synchronization
7.3.9.2.1
Stand-Alone Device
7.3.9.2.2
Paralleled Devices
7.3.10
Input Undervoltage Lockout (UVLO)
7.3.11
Turnon and Turnoff Delay and Sequencing
7.3.12
Soft-Start Time and TON_RISE Command
7.3.13
Soft-Stop Time and TOFF_FALL Command
7.3.14
Prebiased Output Start-Up
7.3.15
Power Good (PGOOD) Indicator
7.3.16
Linear Regulators BP3 and BP6
7.3.17
VREF_TRIM
7.3.18
MARGIN
7.3.19
Parallel Application
7.3.20
Parallel Operation
7.3.21
Telemetry
7.3.21.1
Output Current Telemetry
7.3.21.2
Output Voltage Telemetry
7.3.21.3
Junction Temperature Telemetry
7.3.22
Overtemperature Protection
7.3.23
Overcurrent Protection
7.3.24
Output Overvoltage and Undervoltage Protection
7.3.25
Fault Protection Responses
7.4
Device Functional Modes
7.4.1
Continuous Conduction Mode
7.4.2
Operation With CNTL Signal Control
7.4.3
Operation With OPERATION Control
7.4.4
Operation With CNTL and OPERATION Control
7.5
Register Maps
7.5.1
OPERATION (01h)
7.5.1.1
On Bit
7.5.1.2
Off Bit
7.5.1.3
Margin Bit
7.5.2
ON_OFF_CONFIG (02h)
7.5.2.1
pu Bit
7.5.2.2
cmd Bit
7.5.2.3
cpr Bit
7.5.2.4
pol Bit
7.5.2.5
cpa Bit
7.5.3
CLEAR_FAULTS (03h)
7.5.4
WRITE_PROTECT (10h)
7.5.4.1
bit5
7.5.4.2
bit6
7.5.4.3
bit7
7.5.5
STORE_DEFAULT_ALL (11h)
7.5.6
RESTORE_DEFAULT_ALL (12h)
7.5.7
STORE_USER_ALL (15h)
7.5.8
RESTORE_USER_ALL (16h)
7.5.9
CAPABILITY (19h)
7.5.10
SMBALERT_MASK (1Bh)
7.5.11
VOUT_MODE (20h)
7.5.11.1
Mode Bit
7.5.11.2
Exponent Bit
7.5.12
VOUT_COMMAND (21h)
7.5.12.1
Exponent
7.5.12.2
Mantissa
7.5.13
VOUT_MAX (24h)
7.5.13.1
Exponent
7.5.13.2
Mantissa
7.5.14
VOUT_TRANSITION_RATE (27h)
7.5.14.1
Exponent
7.5.14.2
Mantissa
7.5.15
VOUT_SCALE_LOOP (29h)
7.5.15.1
Exponent
7.5.15.2
Mantissa
7.5.16
VOUT_MIN (2Bh)
7.5.16.1
Exponent
7.5.16.2
Mantissa
7.5.17
VIN_ON (35h)
7.5.17.1
Exponent
7.5.17.2
Mantissa
7.5.18
VIN_OFF (36h)
7.5.18.1
Exponent
7.5.18.2
Mantissa
7.5.19
IOUT_CAL_OFFSET (39h)
7.5.19.1
Exponent
7.5.19.2
Mantissa
7.5.20
VOUT_OV_FAULT_RESPONSE (41h)
7.5.20.1
RSP[1] Bit
7.5.20.2
RS[2:0] Bits
7.5.20.3
TD[2:0] Bits
7.5.21
VOUT_UV_FAULT_RESPONSE (45h)
7.5.21.1
RSP[1] Bit
7.5.21.2
RS[2:0] Bits
7.5.21.3
TD[2:0] Bits
7.5.22
IOUT_OC_FAULT_LIMIT (46h)
7.5.22.1
Exponent
7.5.22.2
Mantissa
7.5.23
IOUT_OC_FAULT_RESPONSE (47h)
7.5.23.1
RSP[1:0] Bits
7.5.23.2
RS[2:0] Bits
7.5.23.3
TD[2:0] Bits
7.5.24
IOUT_OC_WARN_LIMIT (4Ah)
7.5.24.1
Exponent
7.5.24.2
Mantissa
7.5.25
OT_FAULT_LIMIT (4Fh)
7.5.25.1
Exponent
7.5.25.2
Mantissa
7.5.26
OT_FAULT_RESPONSE (50h)
7.5.26.1
RSP[1] Bit
7.5.26.2
RS[2:0] Bits
7.5.26.3
TD[2:0] Bits
7.5.27
OT_WARN_LIMIT (51h)
7.5.27.1
Exponent
7.5.27.2
Mantissa
7.5.28
TON_DELAY (60h)
7.5.28.1
Exponent
7.5.28.2
Mantissa
7.5.29
TON_RISE (61h)
7.5.29.1
Exponent
7.5.29.2
Mantissa
7.5.30
TON_MAX_FAULT_LIMIT (62h)
7.5.30.1
Exponent
7.5.30.2
Mantissa
7.5.31
TON_MAX_FAULT_RESPONSE (63h)
7.5.31.1
RSP[1] Bit
7.5.31.2
RS[2:0] Bits
7.5.31.3
TD[2:0] Bits
7.5.32
TOFF_DELAY (64h)
7.5.32.1
Exponent
7.5.32.2
Mantissa
7.5.33
TOFF_FALL (65h)
7.5.33.1
Exponent
7.5.33.2
Mantissa
7.5.34
STATUS_BYTE (78h)
7.5.35
STATUS_WORD (79h)
7.5.36
STATUS_VOUT (7Ah)
7.5.37
STATUS_IOUT (7Bh)
7.5.38
STATUS_INPUT (7Ch)
7.5.39
STATUS_TEMPERATURE (7Dh)
7.5.40
STATUS_CML (7Eh)
7.5.41
STATUS_MFR_SPECIFIC (80h)
7.5.42
READ_VOUT (8Bh)
7.5.42.1
Exponent
7.5.42.2
Mantissa
7.5.43
READ_IOUT (8Ch)
7.5.43.1
Exponent
7.5.43.2
Mantissa
7.5.44
READ_TEMPERATURE_1 (8Dh)
7.5.44.1
Exponent
7.5.44.2
Mantissa
7.5.45
PMBUS_REVISION (98h)
7.5.46
IC_DEVICE_ID (ADh)
7.5.47
IC_DEVICE_REV (AEh)
7.5.48
MFR_SPECIFIC_00 (D0h)
7.5.49
VREF_TRIM (MFR_SPECIFIC_04) (D4h)
7.5.50
STEP_VREF_MARGIN_HIGH (MFR_SPECIFIC_05) (D5h)
7.5.51
STEP_VREF_MARGIN_LOW (MFR_SPECIFIC_06) (D6h)
7.5.52
PCT_OV_UV_WRN_FLT_LIMITS (MFR_SPECIFIC_07) (D7h)
7.5.53
OPTIONS (MFR_SPECIFIC_21) (E5h)
7.5.53.1
DIS_NEGILIM Bit
7.5.53.2
EN_RESET_B Bit
7.5.53.3
EN_ADC_CNTL Bit
7.5.53.4
VSM Bit
7.5.53.5
DLO Bit
7.5.53.6
AVG_PROG[1:0] Bits
7.5.53.7
EN_AUTO_ARA Bit
7.5.53.8
READ_VOUT_RANGE[1:0] Bits
7.5.53.9
RST_VOUT_oSD Bit
7.5.53.10
RSMLO_VAL Bit
7.5.53.11
RSMHI_VAL Bit
7.5.54
MISC_CONFIG_OPTIONS (MFR_SPECIFIC_32) (F0h)
7.5.54.1
OV_RESP_SEL Bit
7.5.54.2
HSOC_USER_TRIM[1:0] Bits
7.5.54.3
EN_AVS_USER Bit
7.5.54.4
FORCE_SYNC_OUT Bit
7.5.54.5
FORCE_SYNC_IN Bit
7.5.54.6
SYNC_FAULT_DIS Bit
8
Application and Implementation
8.1
Typical Application
8.1.1
Design Requirements
8.1.2
Detailed Design Procedure
8.1.2.1
Custom Design With WEBENCH® Tools
8.1.2.2
Setting the Output Voltage
8.1.2.3
Input and Output Capacitance
8.1.2.4
Selecting the Compensation Components
8.1.2.5
Setting the Switching Frequency
8.1.2.6
Power Good (PGOOD)
8.1.2.7
ON/OFF Control (CNTL)
8.1.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
Package Specifications
10.4
EMI
10.5
Mounting and Thermal Profile Recommendation
11
器件和文档支持
11.1
器件支持
11.1.1
开发支持
11.1.1.1
使用 WEBENCH® 工具创建定制设计
11.2
文档支持
11.2.1
相关文档
11.3
接收文档更新通知
11.4
社区资源
11.5
商标
11.6
静电放电警告
11.7
术语表
12
机械、封装和可订购信息
12.1
Tape and Reel Information
封装选项
机械数据 (封装 | 引脚)
MOL|59
MPQF484B
散热焊盘机械数据 (封装 | 引脚)
订购信息
zhcsg68f_oa
zhcsg68f_pm
7.4
Device Functional Modes
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