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ZHCSHH6B January 2018 – JANUARY 2019 TPSM846C24

PRODUCTION DATA.

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机械数据 (封装 | 引脚)

MOL|59
- MPQF484B

散热焊盘机械数据 (封装 | 引脚)

订购信息

10.1 Layout Guidelines

Layout is critical for good power-supply design. Figure 20 and Figure 21 show top-side and bottom-side PCB-layout configuration for recommended component placement. Additional power, ground and signal layers are present in any PCB design. A list of PCB layout considerations using these devices is listed as follows:

Place the input bypass capacitors as close as physically possible to the VIN and PGND pins. Additionally, a high-frequency bypass capacitor on the VIN pins can help reduce switching spikes. This capacitor can be placed on the bottom side of the PCB directly underneath the device to keep a minimum loop.
The BP6 bypass capacitor carries a large switching current for the gate driver. Bypassing the BP6 pin to BP6_RTN with a low-impedance path is very critical to the stable operation of the TPSM846C24 device. Place the BP6 high-frequency bypass capacitor as close as possible to the device pins 48 and 49.
The VINBP and BP3 pins also require good local bypassing. Place bypass capacitors as close as possible to the device pins and BP_RTN. Poor bypassing on the VINBP and BP3 pins can degrade the performance of the device.
Place signal components as close as possible to the pins to which they are connected. These components include the feedback resistors and the RT resistor. Keep these components away from fast switching voltage and current paths. Terminate these components to AGND with a minimum return loop.
Route the VS+ and VS– lines from the output capacitor bank at the load back to the device pins as a tightly coupled differential pair. These traces must be kept away from switching or noisy areas which can add differential-mode noise.
Use caution when routing of the SYNC, VSHARE and ISHARE traces for parallel configurations. The SYNC trace carries a rail-to-rail signal and must be routed away from sensitive analog signals, including the VSHARE, ISHARE, RT, and FB signals. The VSHARE and ISHARE traces must also be kept away from fast switching voltages or currents formed by the VIN, PH, and BP6 pins.