Before beginning a design using one of the
devices, consider the following:
- Place the input and output capacitors on the top
side of the PCB. In order to shield and isolate
the small signal traces from noisy power lines,
insert at least one solid ground inner plane.
- At least thirteen PGND vias are required to be
placed as close as possible to the PGND pins (pins
1, 20, 21, 22, 24, and 25). This minimizes
parasitic impedance and also lowers thermal
resistance.
- Always place the feedback resistors near the
device to minimize the FB trace distance, no
matter single-end sensing or remote sensing.
- For remote sensing, the connections from the FB
voltage divider resistors to the remote location
should be a pair of PCB traces with at least
12-mil trace width, and should implement Kelvin
sensing across a high bypass capacitor of 0.1 μF
or higher. The ground connection of the remote
sensing signal must be connected to the VSNS– pin.
The VOUT connection of the remote
sensing signal must be connected to the feedback
resistor divider with the lower feedback resistor
terminated at the VSNS– pin. To maintain stable
output voltage and minimize the ripple, the pair
of remote sensing lines should stay away from any
noise sources such as inductor and SW nodes, or
high frequency clock lines. And it is recommended
to shield the pair of remote sensing lines with
ground planes above and below.
- For single-end sensing, connect the higher FB
resistor to a high-frequency local bypass
capacitor of 0.1-μF or higher, and short VSNS– to
AGND with shortest trace.
- Pin 8 (AGND pin) must be connected to a solid
PGND plane at a single point. Use the common AGND
via to connect the TRIP and MODE resistors to the
inner ground plane if applicable. Pin 14 is also
an AGND pin, and is connected internally to pin 8.
No external connection between pins 8 and 14 is
required, however, pin 8 must be used as the AGND
connection.
- See Figure 10-1 for the layout
recommendation.