ZHCSOO7A August   2021  – November 2021 TPSM8A28 , TPSM8A29

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Internal VCC LDO and Using External Bias on VCC Pin
      2. 7.3.2  Enable
      3. 7.3.3  Output Voltage Setting
        1. 7.3.3.1 Remote Sense
      4. 7.3.4  Internal Fixed Soft Start and External Adjustable Soft Start
      5. 7.3.5  External REFIN for Output Voltage Tracking
      6. 7.3.6  Frequency and Operation Mode Selection
      7. 7.3.7  D-CAP3™ Control
      8. 7.3.8  Low-Side FET Zero-Crossing
      9. 7.3.9  Current Sense and Positive Overcurrent Protection
      10. 7.3.10 Low-Side FET Negative Current Limit
      11. 7.3.11 Power Good
      12. 7.3.12 Overvoltage and Undervoltage Protection
      13. 7.3.13 Out-Of-Bounds (OOB) Operation
      14. 7.3.14 Output Voltage Discharge
      15. 7.3.15 UVLO Protection
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Auto-Skip Eco-Mode Light Load Operation
      2. 7.4.2 Forced Continuous-Conduction Mode
      3. 7.4.3 Powering the Device From a 12-V Bus
      4. 7.4.4 Powering the Device From a 5.0-V Bus
      5. 7.4.5 Powering the Device From a Split-Rail Configuration
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Output Voltage Setting Point
        2. 8.2.2.2  Choose the Inductor
        3. 8.2.2.3  Set the Current Limit (TRIP)
        4. 8.2.2.4  Choose the Output Capacitor
        5. 8.2.2.5  Choose the Input Capacitors (CIN)
        6. 8.2.2.6  Soft-Start Capacitor (SS/REFIN Pin)
        7. 8.2.2.7  EN Pin Resistor Divider
        8. 8.2.2.8  VCC Bypass Capacitor
        9. 8.2.2.9  BOOT Capacitor
        10. 8.2.2.10 PGOOD Pullup Resistor
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Thermal Performance on the TI EVM
    3. 10.3 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 接收文档更新通知
    4. 11.4 支持资源
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Powering the Device From a 12-V Bus

Both TPSM8A28 and TPSM8A29 can be powered by a single 12-V bus. In this configuration, the internal LDO is powered by a 12-V bus and generates a 4.5-V output to bias the internal analog circuitry and also powers up the gate drives. The VIN range under this configuration for TPSM8A29 is 4 V to 16 V for up to 15-A load current. VIN range for TPSM8A28 is 3 V to 16 V for up to 12 A. Figure 7-4 shows an example for this single VIN configuration.

VIN and EN are the two signals to enable the part. For a start-up sequence, any sequence between the VIN and EN signals can power the device up correctly.

Figure 7-4 Single VIN Configuration With 12-V Bus