ZHCSNL3A December 2021 – November 2023 TPSM8D6C24
PRODUCTION DATA
Configuring a TPSM8D6C24 device as a loop follower disables all pinstraps except MSEL2, which programs (37h) INTERLEAVE for stacking and (ECh) MFR_SPECIFIC_28 (STACK_CONFIG), (4Ah) IOUT_OC_WARN_LIMIT, and (46h) IOUT_OC_FAULT_LIMIT with a single resistor to AGND. Note that the loop controller is always device 0.
| Resistor to AGND Code | Device Number, Number of Phases | IOUT_OC_WARN_LIMIT (A)/IOUT_OC_FAULT_LIMIT (A) |
|---|---|---|
| Short | Device 1, 2-phase | 40/52 |
| Float | Device 1, 2-phase | 30/39 |
| 6 | Device 1, 2-phase | 40/52 |
| 7 | Device1, 2-phase | 30/39 |
| 4 | Device 1, 3-phase | 40/52 |
| 5 | Device 1, 3-phase | 30/39 |
| 8 | Device 2, 3-phase | 40/52 |
| 9 | Device 2, 3-phase | 30/39 |
| 2 | Device 1, 4-phase | 40/52 |
| 3 | Device 1, 4-phase | 30/39 |
| 14 | Device 2, 4-phase | 40/52 |
| 15 | Device 2, 4-phase | 30/39 |
| 10 | Device 3, 4-phase | 40/52 |
| 11 | Device 3, 4-phase | 30/39 |
During the power-on sequence, device 0 (stack loop controller) reads back phase information from all connected loop followers, if any loop follower phase response does not match the (ECh) MFR_SPECIFIC_28 (STACK_CONFIG) results of the loop controller, the converter sets the POR fault bit in (80h) STATUS_MFR_SPECIFIC but does not allow conversion. Once all connected devices respond to device 0, device 0 passes remaining pin-strap information to the loop followers to ensure matched programming during operation. Adding an additional phase requires adjusting the MSEL2 resistors on the loop controller device and the MSEL2 resistor to ground on all other loop follower devices.