ZHCSRQ4 august 2023 TPSM8S6C24
PRODUCTION DATA
| CMD Address | 1Bh (with CMD byte = 7Ah) |
| Write Transaction: | Write Word |
| Read Transaction: | Block-Write/Block-Read Process Call |
| Format: | Unsigned Binary (1 byte) |
| Phased: | No, Only PHASE = FFh is supported |
| NVM Back-up: | EEPROM |
| Updates: | On-the-fly |
SMBALERT_MASK bits for the STATUS_VOUT command
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RW | RW | RW | RW | RW | RW | R | R |
| mVOUT_OVF | mVOUT_OVW | mVOUT_UVW | mVOUT_UVF | mVOUT_MINMAX | mTON_MAX | 0 | 0 |
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7 | mVOUT_ OVF | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 6 | mVOUT_ OVW | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 5 | mVOUT_ UVW | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 4 | mVOUT_ UVF | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 3 | mVOUT_ MINMAX | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 2 | mTON_ MAX | RW | NVM | 0b: SMBALERT may assert due to this condition. 1b: SMBALERT may NOT assert due to this condition. |
| 1:0 | Not supported | R | 00b | Not supported and always set to 00b. |